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Renesas PTX1xxR IoT-Reader API (non-OS) Version 7.3.1
Renesas Software Stack for IoT-Reader Applications (non-OS)
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Macros | |
| #define | PTX_HAL_WRITE_TIMEOUT (500u) |
| #define | PTX_HAL_READ_TIMEOUT (500u) |
| #define | PTX_NSC_RESPONSE_TIMEOUT (uint32_t)(20 * PTX_HAL_READ_TIMEOUT) |
| #define | PTX_NSC_HAL_ADDRESS_LENGTH (0x02u) |
| #define | PTX_NSC_HAL_BUFFER_LENGTH_RX_MAX (256u) |
| #define | PTX_NSC_HAL_DUMMY_VALUE (0xFFu) |
| #define | PTX_NSC_LENGTH_MAX (255u) |
| #define | PTX_NSC_HAL_PAYLOAD_LENGTH_WI_MAX (252u) |
| #define | PTX_NSC_HAL_WRITE_INSTRUCTION_MASK (0x04u) |
| #define | PTX_NSC_HAL_WRITE_RANDOM_ADDRESS_MASK (0x05u) |
| #define | PTX_NSC_HAL_READ_BUFFER_MASK (0x03u) |
| #define | PTX_NSC_HAL_WRITE_BUFFER_MASK (0x07u) |
| #define | PTX_NSC_HAL_READ_RANDOM_ADDRESS_MASK (0x01u) |
| #define | PTX_NSC_HAL_READ_CONTINUOUS_ADDRESS_MASK (0x02u) |
| #define | PTX_NSC_HAL_WRITE_CONTINUOUS_ADDRESS_MASK (0x06u) |
| #define | PTX_NSC_HAL_BUFFER_ADDRESS_MASK (0x1Fu) |
Typedefs | |
| typedef enum ptxNscHal_BufferId | ptxNscHal_BufferId_t |
| ID of buffers handled by Hardware. | |
Enumerations | |
| enum | ptxNscHal_BufferId { NscWriteBuffer_0 , NscWriteBuffer_1 , NscWriteBuffer_2 , NscWriteBuffer_3 , NscWriteBuffer_4 , NscWriteBuffer_5 , NscWriteBuffer_6 , NscWriteBuffer_7 , NscWriteBuffer_8 , NscWriteBuffer_9 , NscWriteBuffer_10 , NscWriteBuffer_11 , NscWriteBuffer_12 , NscWriteBuffer_13 , NscWriteBuffer_14 , NscWriteBuffer_15 , NscWriteBuffer_Max } |
| ID of buffers handled by Hardware. | |
Functions | |
| ptxStatus_t | ptxNSC_HAL_WriteBuffer (struct ptxNSC *nscCtx, ptxNscHal_BufferId_t bufferId, uint8_t *txBuf[], size_t txLen[], size_t numBuffers) |
| Internal command to exchange NSC-commands using buffers. | |
| ptxStatus_t | ptxNSC_HAL_Wra (struct ptxNSC *nscCtx, uint16_t address, uint8_t value) |
| Internal command to write certain SFRs. | |
| ptxStatus_t | ptxNSC_HAL_Wra_NoWait (struct ptxNSC *nscCtx, uint16_t address, uint8_t value) |
| Internal command to write certain SFRs (operating-mode dependent). | |
| ptxStatus_t | ptxNSC_HAL_Wra_NoCheck (struct ptxNSC *nscCtx, uint16_t address, uint8_t value) |
| Internal command to write certain SFRs (operating-mode dependent). | |
| ptxStatus_t | ptxNSC_HAL_Rra (struct ptxNSC *nscCtx, uint16_t address, uint8_t *value) |
| Internal command to read certain SFRs. | |
| ptxStatus_t | ptxNSC_HAL_WriteInstruction (struct ptxNSC *nscCtx, uint16_t address, uint8_t *pPayload, size_t txLen) |
| Internal command to write NSC-instructions. | |
| #define PTX_HAL_READ_TIMEOUT (500u) |
Hal read timeout in ms.
| #define PTX_HAL_WRITE_TIMEOUT (500u) |
Hal write timeout in ms.
| #define PTX_NSC_HAL_ADDRESS_LENGTH (0x02u) |
Hal Address length.
| #define PTX_NSC_HAL_BUFFER_ADDRESS_MASK (0x1Fu) |
HAL buffer address mask
| #define PTX_NSC_HAL_BUFFER_LENGTH_RX_MAX (256u) |
HAL Maximum RX buffer length.
| #define PTX_NSC_HAL_DUMMY_VALUE (0xFFu) |
HAL Dummy Value.
| #define PTX_NSC_HAL_PAYLOAD_LENGTH_WI_MAX (252u) |
Maximum payload that can be taken by Write Instruction on Uart (used as well for other interfaces.)
| #define PTX_NSC_HAL_READ_BUFFER_MASK (0x03u) |
HAL read buffer mask
| #define PTX_NSC_HAL_READ_CONTINUOUS_ADDRESS_MASK (0x02u) |
HAL read continuous address mask
| #define PTX_NSC_HAL_READ_RANDOM_ADDRESS_MASK (0x01u) |
HAL read random address mask
| #define PTX_NSC_HAL_WRITE_BUFFER_MASK (0x07u) |
HAL write buffer mask
| #define PTX_NSC_HAL_WRITE_CONTINUOUS_ADDRESS_MASK (0x06u) |
HAL write continuous address mask
| #define PTX_NSC_HAL_WRITE_INSTRUCTION_MASK (0x04u) |
HAL write instruction mask
| #define PTX_NSC_HAL_WRITE_RANDOM_ADDRESS_MASK (0x05u) |
HAL write Random address mask
| #define PTX_NSC_LENGTH_MAX (255u) |
Maximum size of NSC_CMD. 256 (Maximun on Uart - 1 Opcode for Write buffer operation)
| #define PTX_NSC_RESPONSE_TIMEOUT (uint32_t)(20 * PTX_HAL_READ_TIMEOUT) |
Hal response timeout in ms.
| ptxStatus_t ptxNSC_HAL_Rra | ( | struct ptxNSC * | nscCtx, |
| uint16_t | address, | ||
| uint8_t * | value ) |
Internal command to read certain SFRs.
| [in] | nscCtx | Pointer to an initialized instance of the NSC. |
| [in] | address | Address of SFR. |
| [out] | value | Value read. |
| ptxStatus_t ptxNSC_HAL_Wra | ( | struct ptxNSC * | nscCtx, |
| uint16_t | address, | ||
| uint8_t | value ) |
Internal command to write certain SFRs.
| [in] | nscCtx | Pointer to an initialized instance of the NSC. |
| [in] | address | Address of SFR. |
| [in] | value | Value to write. |
| ptxStatus_t ptxNSC_HAL_Wra_NoCheck | ( | struct ptxNSC * | nscCtx, |
| uint16_t | address, | ||
| uint8_t | value ) |
Internal command to write certain SFRs (operating-mode dependent).
| [in] | nscCtx | Pointer to an initialized instance of the NSC. |
| [in] | address | Address of SFR. |
| [in] | value | Value to write. |
| ptxStatus_t ptxNSC_HAL_Wra_NoWait | ( | struct ptxNSC * | nscCtx, |
| uint16_t | address, | ||
| uint8_t | value ) |
Internal command to write certain SFRs (operating-mode dependent).
| [in] | nscCtx | Pointer to an initialized instance of the NSC. |
| [in] | address | Address of SFR. |
| [in] | value | Value to write. |
| ptxStatus_t ptxNSC_HAL_WriteBuffer | ( | struct ptxNSC * | nscCtx, |
| ptxNscHal_BufferId_t | bufferId, | ||
| uint8_t * | txBuf[], | ||
| size_t | txLen[], | ||
| size_t | numBuffers ) |
Internal command to exchange NSC-commands using buffers.
| [in] | nscCtx | Pointer to an initialized instance of the NSC. |
| [in] | bufferId | Buffer identifier. |
| [in] | txBuf | Pointer to an array of buffers. |
| [in] | txLen | Pointer to an array containing length-information for each buffer. |
| [in] | numBuffers | Number of buffers. |
| ptxStatus_t ptxNSC_HAL_WriteInstruction | ( | struct ptxNSC * | nscCtx, |
| uint16_t | address, | ||
| uint8_t * | pPayload, | ||
| size_t | txLen ) |
Internal command to write NSC-instructions.
| [in] | nscCtx | Pointer to an initialized instance of the NSC. |
| [in] | address | Instruction address. |
| [in] | pPayload | Pointer to buffer containing instructions. |
| [in] | txLen | Number of instructions. |