概览

Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for non parity DDR2 RDIMMs for 400 and 533MHz.  

  • 1:1 and 1:2 registered buffer
  • 1.8V Operation
  • SSTL_18 style clock and data inputs
  • Differential CLK input
  • Control inputs compatible with LVCMOS levels
  • Flow-through architecture for optimum PCB design
  • Latch-up performance exceeds 100mA
  • ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0)
  • Maximum operating frequency: 340MHz

文档

= 相关文档
类型 文档标题 日期
数据手册
74SSTU32864/A/C/D/G Datasheet
PDF 232 KB
End Of Life Notice
PDN# : CQ-14-06R1 Revised Product Discontinuance Notice
PDF 407 KB
End Of Life Notice
PDN# : CQ-14-06 MANUFACTURING DISCONTINUANCE NOTICE
PDF 192 KB
产品变更通告
PCN# : A-0610-02 ASAT China as Alternate Facility for CABGA/CVBGA/FPBGA/TQFP/PQFP
PDF 252 KB
产品变更通告
PCN# A-0607-05 Green Mold Compound KMC3580 for BGA
PDF 194 KB
产品变更通告
PCN#: TB-0512-01 Reel Color Changed from Blue to Black
PDF 729 KB
6 items

设计和开发

ECAD 模块

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

扩展 ECAD 模块
Diagram of ECAD Models

产品选择

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    购买 / 样片
    器件号
    74SSTU32864GBFG
    circle过时
    memory
    view_in_ar
    		CABGA 96 C Yes Tray
    74SSTU32864GBFG8
    circle过时
    memory
    view_in_ar
    		CABGA 96 C Yes Reel
    Parametric Table tips

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