概览

The 8S89875I is a high speed Differential-to-LVDS Buffer/Divider w/Internal Termination. The 8S89875I has selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider. The clock input has internal termination resistors, allowing it to interface with several differential signal types while minimizing the number of required external components. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards.

8S89875I - Block Diagram
8S89875I - Pinout
8S89875I - Block Diagram
8S89875I - Pinout
  • Two LVDS output pairs
  • Frequency divide select options: ÷1, ÷2, ÷4, ÷8, ÷16
  • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML
  • Input frequency: 2.5GHz (maximum)
  • Cycle-to-cycle jitter, RMS: 4.1ps (maximum)
  • Total jitter: 18ps (maximum)
  • Output skew: 15ps (maximum)
  • Part-to-part skew: 280ps (maximum)
  • Propagation delay: 1000ps (maximum)
  • Full 2.5V supply mode
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package
  • Pin compatible with the obsolete device, 889875AK

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设计和开发

ECAD 模块

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

扩展 ECAD 模块
Diagram of ECAD Models

产品选择

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    购买 / 样片
    器件号
    8S89875AKILF
    circle过时
    memory
    view_in_ar
    		VFQFPN 16 I Yes Tray
    8S89875AKILFT
    circle过时
    memory
    view_in_ar
    		VFQFPN 16 I Yes Reel
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