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概览

描述

The ADC1112D125HN is a dual channel 11-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, because of a separate digital output supply. It supports the Low Voltage Differential Signaling (LVDS) Double Data Rate (DDR) output standard.

特性

  • Clock input divider by 2 for less jitter contribution
  • CMOS or LVDS DDR digital outputs
  • Duty cycle stabilizer
  • Input bandwidth, 600 MHz
  • Offset binary, 2's complement, gray code
  • Power dissipation, 1200 mW
  • Power-down and Sleep modes
  • Sample rate up to 125 Msps
  • Serial Peripheral Interface (SPI)
  • SFDR, 90 dBc
  • Single 3 V supply
  • SNR, 68 dBFS

产品对比

应用

文档

类型 文档标题 日期
数据手册 PDF 595 KB
EOL 通告 PDF 528 KB
2 items

设计和开发

模型

ECAD 模块

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Diagram of ECAD Models

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