概览
描述
The 8T49N240-EVK is designed to help the customer evaluate the 8T49N240 Universal Frequency Translator (UFT 3G). When the board is connected to a PC running Timing Commander software™ through USB, the device can be configured and programmed through a graphical interface or through register settings, to generate frequencies with best-in-class performance.
特性
- Board comes pre-populated with the 8T49N240
- Four LVPECL Outputs capable of generating almost any output frequency using IDT Timing Commander software™
- SMA connectors for each output pair
- Outputs terminate to 50 ohms on a scope
- USB Cable
应用
设计和开发
软件与工具
软件与工具
| Software title
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Software type
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公司
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|---|---|---|
| Timing Commander Timing Commander™ 是一个基于 Windows™ 的创新软件平台，通过这个平台，系统设计工程师可以通过直观且灵活的图形用户界面 (GUI) 对精密的计时设备进行配置、编程和监控。
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Code Generator | 瑞萨电子 |
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视频和培训
IDT 8T49N240 Programmable Clock Generator and Jitter Attenuator for 10Gbps, 40Gbps, and 100Gbps
An overview of the IDT® 8T49N240, highly programmable clock generator and jitter attenuator IC. The device features less than 200fs of phase noise, providing valuable system design margin for 10Gbps interfaces in wireline and wireless communication networks. The additional phase noise margin eases system design constraints, allowing engineers to minimize bit error rates (BER) while lowering overall system costs.
The 8T49N240 is the latest member of IDT's third-generation Universal Frequency Translator (UFT™) family. It features the ability to produce virtually any common output frequency from virtually any input frequency. The highly flexible, high-performance clock generator and jitter attenuator is ideal for 10Gbps or multi-lane 40Gpbs / 100Gbps timing applications where 300fs of phase noise is typically the maximum acceptable amount allowed at the physical ports. The 200fs phase noise specification of the 8T49N240 provides ample noise margin, enabling engineers to simplify their clock tree designs and utilize lower cost PCBs.
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