概览
描述
The 72V221 is a 1K x 9 First-In, First-Out (FIFO) memory with clocked read and write controls. It is a 3.3V version of the 72221 device and is applicable for a wide variety of data buffering needs such as graphics, local area networks, and interprocessor communication. It has 9-bit input and output ports. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronously of one another for dual clock operation.
特性
- 10ns read/write cycle time
- 5V input tolerant
- Read and Write clocks can be independent
- Dual-ported zero fall-through time architecture
- Empty and Full flags signal FIFO status
- Programmable Almost-Empty and Almost-Full flags can be set to any depth
- Programmable Almost-Empty and Almost-Full flags default to Empty+7, and Full-7, respectively
- Output Enable puts the output data bus in a high-impedance state
- Available in 32-pin PLCC and TQFP packages
- Industrial temperature range (–40 °C to +85 °C) is available
产品对比
应用
设计和开发
模型
ECAD 模块
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