跳转到主要内容

概览

描述

The 74FCT573T is an Octal Transparent CMOS Latch built with 3-state outputs. This transparent latch is intended for bus-oriented applications. When Latch Enable (LE) is high, flip-flops appear transparent to the data; and when Latch Enable is low, the data that meets the set-up time is latched. The 74FCT573T CMOS latch operates at -40C to +85C. (For Mil version, see 54FCT573T).

特性

  • A and C speeds
  • Low input and output leakage 1 uA (max.)
  • CMOS power levels
  • True TTL input and output compatibility: VOH = 3.3V (typ.) VOL = 0.3V (typ.)
  • High Drive outputs (-15mA IOH, 48mA IOL)
  • Meets or exceeds JEDEC standard 18 specifications
  • Power off disable outputs permit “live insertion”
  • Available in 20 pin SOIC and QSOP packages

产品对比

应用

文档

设计和开发

模型

ECAD 模块

点击产品选项表中的产品,查找 SamacSys 中的原理图符号、PCB 足迹和 3D CAD 模型。点击产品选项表中的产品,查找 SamacSys 中的原理图符号、PCB 足迹和 3D CAD 模型。
 

Diagram of ECAD Models

产品选项

当前筛选条件