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概览

描述

The 5V50015 generates a low EMI output clock from a clock or crystal input. The part is designed to dither the LCD interface clock for PDAs, printers, scanners, modems, copiers, and others. Using IDT's proprietary mix of analog and digital Phase-Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output, reducing the frequency amplitude peaks by several dB. IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to remove crystals and oscillators from your board.

特性

  • Packaged in 8-pin SOIC/TSSOP
  • Provides a spread spectrum output clock
  • 135 MHz to 200 MHz operation
  • Accepts a clock input (provides same frequency dithered output)
  • Center spread modulation
  • Peak reduction by 8 dB to 16 dB typical on 3rd through 19th odd harmonics
  • Low EMI feature can be disabled
  • Operating voltage of 3.3 V
  • Advanced, low-power CMOS process

产品对比

应用

文档

类型 文档标题 日期
数据手册 PDF 256 KB
EOL 通告 PDF 192 KB
2 items

设计和开发

模型

ECAD 模块

点击产品选项表中的 CAD 模型链接,查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用,可直接在 SamacSys 请求该符号或模型。

Diagram of ECAD Models

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