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概览

描述

The 664-02 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The 664-02 uses the latest Phase-Locked Loop (PLL) technology to provide excellent phase noise and long-term jitter performance for superior synchronization and S/N ratio. For audio sampling clocks generated from 27 MHz, use the 661. Please contact IDT if you have a requirement for an input and output frequency not included in this document. IDT can rapidly modify this product to meet special requirements.

特性

  • Packaged in 16-pin TSSOP
  • Pb (lead) free package, RoHS compliant
  • Clock or crystal input
  • Low phase noise
  • Low jitter
  • Exact (0 ppm) multiplication ratios
  • Power-down control
  • Improved phase noise over ICS660
  • Differential outputs
  • Supports SMTE 292M HD-SDI standard for HDTV broadcast

产品对比

应用

文档

类型 文档标题 日期
数据手册 PDF 252 KB
EOL 通告 PDF 218 KB
产品变更通告 PDF 611 KB
产品变更通告 PDF 611 KB
产品变更通告 PDF 596 KB
产品变更通告 PDF 544 KB
产品变更通告 PDF 663 KB
产品变更通告 PDF 439 KB
产品变更通告 PDF 361 KB
9 items

设计和开发

模型

ECAD 模块

点击产品选项表中的 CAD 模型链接,查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用,可直接在 SamacSys 请求该符号或模型。

Diagram of ECAD Models

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