跳转到主要内容

概览

描述

The 72285 is a 64K x 18 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that need to buffer large amounts of data

特性

  • Pin-compatible with the IDT722x5 SuperSync FIFOs
  • 10ns read/write cycle time (6.5ns access time)
  • Fixed, low first word data latency time
  • Auto power down minimizes standby power consumption
  • Retransmit operation with fixed, low first word data latency time
  • Empty, Full and Half-Full flags signal FIFO status
  • Programmable Almost-Empty and Almost-Full flags
  • Easily expandable in depth and width
  • Independent Read and Write Clocks (permit reading and writing simultaneously)
  • Available in 64-pin TQFP and STQFP packages
  • Industrial temperature range (-40C to +85C) is available

产品对比

应用

文档

设计和开发

模型

ECAD 模块

点击产品选项表中的 CAD 模型链接,查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用,可直接在 SamacSys 请求该符号或模型。

Diagram of ECAD Models

模型

类型 文档标题 日期
模型 - SPICE 登录后下载 TAR 32 KB
模型 - IBIS ZIP 11 KB
2 items

产品选项

当前筛选条件