概览
描述
The 74ALVCH32374 high-speed, low-power 32-bit edge-triggered D-type flip-flop is ideal for use as a buffer register for data synchronization and storage. The Output Enable (OE) and clock (CLK) controls are organized to operate the device as four 8-bit registers, two 16-bit registers, or one 32-bit register with common clock. The 74ALVCH32374 has "bus-hold" which prevents floating inputs and eliminates the need for pull-up/down resistors. The 74ALVCH32374 operates at -40C to +85C
特性
- Typical tSK(o) (Output Skew) < 250ps
- ESD > 2000V per MIL-STD-883, Method 3015
- > 200V using machine model (C = 200pF, R = 0)
- VCC = 3.3V ± 0.3V, Normal Range
- VCC = 2.7V to 3.6V, Extended Range
- VCC = 2.5V ± 0.2V
- CMOS power levels (0.4 uW typ. static)
- Rail-to-Rail output swing for increased noise margin
- High Output Drivers: ±24mA
- Suitable for Heavy Loads
- Available in 96-ball LFBGA package
产品对比
应用
设计和开发
模型
ECAD 模块
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