概览
描述
Provides 12 PCIe Gen2 lanes and 12 ports of high-performance, deterministic system interconnect switching. All ports receive full line rate, non-blocking throughput for multiple traffic flows regardless of switch loading.
特性
- 12 PCIe Gen2 Lanes, 12 Switch Ports
- Non-blocking switch architecture optimized for High Performance System Interconnect
- Partionable switch architecture for true multi-root support
- Multiple Nontransparent Bridging functions supported (NTB)
- Movable upstream support
- On-board DMA support
- Internal buffering and flow control credits optimized for maximum bandwidth and large payloads
- Low latency, Low power
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设计和开发
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