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概览

描述

The CD4028BMS types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all four inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the four inputs, A to D, results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A through C is decoded in octal code at output 0 to 7 if D = 0. High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications. The CD4028BMS is supplied in these 16-lead outline packages: Braze Seal DIP H4S, Frit Seal DIP H1E and Ceramic Flatpack H3X.

特性

  • High-voltage type (20V rating)
  • BCD-to-decimal decoding or binary-to-octal decoding
  • High decoded output drive capability
  • "Positive Logic" inputs and outputs - Decoded outputs go high on selection
  • Medium-speed operation: tPHL, tPLH = 80ns (typ) at VDD = 10V
  • Standardized symmetrical output characteristics
  • 100% tested for quiescent current at 20V
  • Maximum input current of 1µA at 18V over full package temperature range: 100nA at 18V and +25 °C
  • Noise margin (over full package temperature range): 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
  • 5V, 10V and 15V parametric ratings
  • Meets all requirements of JEDEC tentative standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

产品对比

应用

  • Code conversion
  • Indication-Tube decoder
  • Address decoding - Memory selection control

文档

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6 items

设计和开发

模型

ECAD 模块

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Diagram of ECAD Models

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