概览
描述
Support is limited to customers who have already adopted these products.
The HI5662 is a monolithic, dual 8-Bit, 60MSPS analog-to-digital converter fabricated in an advanced CMOS process. It is designed for high speed applications where integration, bandwidth and accuracy are essential. The HI5662 reaches a new level of multi-channel integration. The fully pipeline architecture and an innovative input stage enable the HI5662 to accept a variety of input configurations, single-ended or fully differential. Only one external clock is necessary to drive both converters and an internal band-gap voltage reference is provided. This allows the system designer to realize an increased level of system integration resulting in decreased cost and power dissipation. The HI5662 has excellent dynamic performance while consuming only 650mW power at 60MSPS. The A/D only requires a single +5V power supply and encode clock. Data output latches are provided which present valid data to the output bus with a latency of 6 clock cycles. For those customers needing dual channel 10-bit resolution, please refer to the HI5762. For single channel 10-bit applications, please refer to the HI5767.
特性
- Sampling Rate 60MSPS
- 7.8 Bits at fIN = 10MHz
- Low Power at 60MSPS 650mW
- Wide Full Power Input Bandwidth 250MHz
- Excellent Channel-to-Channel Isolation >75dB
- On-Chip Sample and Hold Amplifiers
- Internal Band-Gap Voltage Reference 2.5V
- Fully Differential or Single-Ended Analog Inputs
- Single Supply Voltage Operation +5V
- TTL/CMOS Compatible Digital Inputs
- CMOS Compatible Digital Outputs 3.0/5.0V
- Offset Binary Digital Data Output Format
- Dual 8-Bit A/D Converters on a Monolithic Chip
产品对比
应用
文档
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类型 | 文档标题 | 日期 |
数据手册 | PDF 752 KB | |
宣传手册 | PDF 5.41 MB 日本語 | |
手册 - 开发工具 | PDF 613 KB | |
应用说明 | PDF 503 KB | |
应用说明 | PDF 1.08 MB | |
应用说明 | PDF 508 KB | |
应用说明 | PDF 287 KB | |
7 items
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设计和开发
模型
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