概览
描述
The RC19004 is a 4-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19004 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.
特性
- LP-HCSL outputs eliminate up to 16 terminated resistors
- PCIe Gen 1–7 compliance
- Drive both source-terminated and double-terminated loads
- Selectable output slew rate via pin
- Support both 85Ω and 100Ω output impedance versions
- Open-drain LOS (Loss-Of-Signal) indication output
- Power down tolerance (PDT)
- Flexible startup sequencing (FSS)
- Automatic clock parking (ACP)
- Dedicated OE# pins to control group output
- 4-wire Side-Band interface and device daisy-chaining
- SMBus write protection features with 9 selectable addresses
- 4mm × 4mm 28-VFQFPN package
产品对比
应用
设计和开发
软件与工具
模型
ECAD 模块
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视频和培训
PCIe Gen7 RC19 Family Clock Buffer and MUX Overview
The RC family consists of PCIe Gen7 clock buffer and multiplexer solutions, providing the industry's smallest and most compact footprint.
Video List
