概览
描述
The RG5D188 (MDB) is a Gen 1 MRDIMM Data Buffer. Its primary function is to demultiplex and buffer data from the host CPU to DRAMs. Each DDR5 MRDIMM 8800 MT/s would require 10 MDB chips to multiplex the memory channels. It has two 4-bit data interfaces to the host, running at twice the speed of the DRAM interfaces. Each host interface multiplexes two pseudo-channels, both of which have a separate 4-bit DRAM interface. The RG5D188 supports x4 or x8 DRAMs. It also has an input-only control bus interface that is connected to an MRCD, as well as a dedicated pin for ZQ Calibration and loopback outputs for test purposes.
The main benefit of the Multiplexing Data Buffer (MDB) in an MRDIMM (Multiplexed Rank DIMM) is its ability to enhance memory bandwidth and reduce power consumption. The MDB achieves this by converting a 16-bit DRAM interface running at native DRAM speed into an 8-bit host interface operating at twice the speed. This process of multiplexing and demultiplexing allows for higher data transfer rates.
The Renesas MDB (RG5D188) is compatible with DDR5 MRDIMM 8800 MT/s and it supports Intel Xeon 6 CPU’s available since 2024 and is qualified with multiple memory vendors. DDR5 MRDIMMs 8800 MT/s with Renesas MDB (RG5D188) provides 39% more bandwidth and the MDB plays a key role in increasing performance per watt for AI training and inference workloads.
特性
- Pinout optimized MRDIMM PCB layout
- MRDIMM Server speeds up to 8800MT/s
- Supports power-down modes to conserve server power
- Supports 1 rank per pseudo-channel in x4 and up to 2-ranks per pseudo-channel in x8 MRDIMM configurations
- Supports SDP and 3DS DRAM types
- Provides access to internal control words for configuring device features and adapting to different MRDIMM and system applications
- Loopback and pass-through modes
- Training support features for DQ and MDQ interfaces
- ZQ calibration
产品对比
应用
设计和开发
模型
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