概览
描述
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The HIP6521 provides the power control and protection for four output voltages in high-performance microprocessor and computer applications. The IC integrates a voltage-mode PWM controller and three linear controllers, as well as monitoring and protection functions into a 16 Ld SOIC package. The PWM controller is intended to regulate the microprocessor memory core voltage with a synchronous-rectified buck converter. The linear controllers are intended to regulate the computer system's AGP 1. 5V bus power, the 2. 5V clock power, and the 1. 8V power for the North/South Bridge core voltage and/or cache memory circuits. Both the switching regulator and linear voltage references provide ±2% of static regulation over line, load, and temperature ranges. All outputs are user-adjustable by means of an external resistor divider. All linear controllers employ bipolar NPNs for the pass transistors. The HIP6521 monitors all the output voltages. The PWM controller's adjustable overcurrent function monitors the output current by using the voltage drop across the upper MOSFET's rDS(ON). The linear regulator outputs are monitored via the FB pins for undervoltage events.
特性
- Provides 4 Regulated Voltages
- Memory Core, AGP, Clock, and Memory Controller Hub Power
- ACPI Compatible
- Drives Bipolar Linear Pass Transistors
- Externally Resistor-Adjustable Outputs
- Simple Single-Loop Control Design
- Voltage-Mode PWM Control
- Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
- Excellent Output Voltage Regulation
- All Outputs: ±2% Over Temperature
- Overcurrent Fault Monitors
- Switching Regulator Does Not Require Extra Current Sensing Element, Uses MOSFET's rDS(ON)
- Small Converter Size
- 300kHz Constant Frequency Operation
- Small External Component Count
- Pb-Free Plus Anneal Available (RoHS Compliant)
产品对比
应用
文档
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类型 | 文档标题 | 日期 |
数据手册 | PDF 681 KB | |
白皮书 | PDF 295 KB | |
EOL 通告 | PDF 206 KB | |
产品变更通告 | PDF 152 KB | |
应用说明 | PDF 509 KB | |
应用说明 | PDF 397 KB | |
手册 - 开发工具 | PDF 862 KB | |
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设计和开发
模型
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