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当今计算系统的各种接口(PCI Express、SATA、USB、SAS、DMI、QPI、超传输、以太网等)和多种 CPU 架构(Intel、Freescale 等)要求在性能、BOM 成本和电路板空间方面进行一系列复杂的权衡。 DT 与业内领先的 CPU 和计算供应商拥有最长的稳定关系,可提供最大的参考时钟解决方案和增值时钟产品组合,从而实现最佳权衡。
Renesas 是计算计时空间方面的领先创新者,拥有多个第一,其中包括:第一次引进替代标准 HCSL 的低功耗 HCSL 输出,节能比例高达 85%;第一次提供动态频率控制来控制超频/低频;第一次在单个器件中采用多个 PLL 来节省能源和电路板空间。 Renesas 提供最适合特定设计的主板时钟和服务器时钟解决方案。 浏览下面所列出的器件,查找理想的计算时钟解决方案。
Chipset Manufacturer |
Clock Spec. |
100M SSC Outputs |
100M Non-SSC Outputs |
PCI 33.33M Outputs (#) |
25M Outputs |
Advanced Features |
Power Consumption Typ (mW) |
App Jitter Compliance |
Supply Voltage (V) |
Output Type |
Xtal Freq (MHz) |
Diff. Termination Resistors |
Lead Count (#) |
Package Area (mm²) |
Chipset Name |
Pkg. Type |
|
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
器件号 | |||||||||||||||||
System Clock Generator for Loongson Platform | Loongson | Loongson 7A | 0 | 8 | 0 | 1 | 33MHz or 48MHz, 200MHz Differential LVDS | 232 | 10GbE, PCIe Gen1, PCIe Gen2, PCIe Gen3, USB 3.0 | 1.8 - 3.3 | HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL | 25 | 0 | 48 | 7A1000, L3A3000 | VFQFPN | |
Clock Generator for Freescale P1010, P1020, P2020, P2040 Processors | NXP | Programmable Clock, Spread Spectrum | PCIe Gen1, PCIe Gen2, PCIe Gen3 | 3.3 | HCSL, LVCMOS | 25 | 48 | 49, 76.3 | P1010, P1020, P2020, P2040 | TSSOP, VFQFPN | |||||||
HCSL/LVCMOS Clock Generator | Cavium | Cavium: Period Jitter < 70 ps | 0 | 10 | 0 | 2 | 25M output(s), 50M output(s), 100M output(s), 125M output(s) and more... |
901 | PCIe Gen1, PCIe Gen2, PCIe Gen3, XAUI | 3.3 | HCSL, LVCMOS | 25 | 40 | 72 | 100 | VFQFPN | |
Clock Generator For Cavium Processors | Cavium | Cavium: Period Jitter < 70 ps | 0 | 10 | 0 | 2 | 25M output(s), 50M output(s), 100M output(s), 125M output(s) and more... |
901 | PCIe Gen1, PCIe Gen2, PCIe Gen3, XAUI | 3.3 | HCSL, LVCMOS | 25 | 40 | 72 | 100 | VFQFPN | |
FemtoClock™ NG Crystal-to-LVDS/HCSL Clock Synthesizer | Cavium | Cavium: Period Jitter < 44 ps | 0 | 4 | 0 | 0 | 100M output(s), 125M output(s), 156.25M output(s) and more... |
834 | RXAUI, XAUI | 2.5 - 3.3 | HCSL, LVDS | 25 | 10 | 32 | 25 | VFQFPN | |
FemtoClock™ Crystal-to-Differential HCSL/LVCMOS Frequency Synthesizer | Cavium | Cavium: Period Jitter < 70 ps | 1 | 2 | 0 | 12 | Frequency Margining, Programmable Clock, Spread Spectrum | 1060 | PCIe Gen1, PCIe Gen2, PCIe Gen3 | 3.3 | HCSL, LVCMOS | 25 | 6 | 56 | 64 | VFQFPN | |
Clock Generator For Cavium Processors | Cavium | Cavium: Period Jitter < 44 ps | 0 | 10 | 0 | 2 | 25M output(s), 50M output(s), 100M output(s), 125M output(s) and more... |
970 | PCIe Gen1, PCIe Gen2, PCIe Gen3, RXAUI, XAUI | 3.3 | HCSL, LVCMOS | 25 | 40 | 72 | 100 | VFQFPN | |
CK420BQ Synthesizer | Intel | CK420BQ | 7 | 4 | 5 | 0 | 14.318M output(s), 48M output(s), DOT96M output pair(s) | 1300 | PCIe Gen1, PCIe Gen2, PCIe Gen3, QPI | 3.3 | HCSL, LVTTL | 25 | 48 | 64 | 81, 103.7 | C600, Lewisburg, Patsburg, Wellsburg | TSSOP, VFQFPN |
CK420BQ Derivative Synthesizer | Intel | CK420BQ Derivative | 3 | 2 | 5 | 0 | 14.318M output(s), 48M output(s), DOT96M output pair(s) | 825 | PCIe Gen1, PCIe Gen2, PCIe Gen3, QPI | 3.3 | HCSL, LVTTL | 25 | 24 | 48 | 36 | C600, Lewisburg, Patsburg, Wellsburg | VFQFPN |
56-Pin CK505 Derivative for Embedded Systems | Intel | CK505 Derivative | 7 | 1 | 5 | 1 | 14.318M output(s), 48M output(s), CPU 100M-400M output pair(s) and more... |
450 | PCIe Gen1, PCIe Gen2 | 3.3 | LP-HCSL, LVTTL | 14.318 | 0 | 56 | 85.4 | TSSOP | |
64-Pin CK505 Derivative for Embedded Systems | Intel | CK505 Derivative | 12 | 1 | 5 | 1 | 14.318M output(s), 48M output(s), CPU 100M-400M output pair(s) and more... |
383 | PCIe Gen1, PCIe Gen2 | 3.3 | LP-HCSL, LVTTL | 14.318 | 0 | 64 | 81, 103.7 | TSSOP, VFQFPN | |
CK-MNG+ Peripheral Synthesizer for Intel Servers | Intel | CK-MNG+ | 1 | 0 | 1 | 2 | 32.768k output(s), 50M output(s), 125M output(s), DOT96M output pair(s) | 673 | 3.3 | HCSL, LVTTL | 25 | 8 | 40 | 36 | C600, Lewisburg, Patsburg, Wellsburg | VFQFPN | |
CK-µS for Intel µServers with 1GbE, PCIe Gen1-3 and SATA 1-3 | Intel | LP-HCSL | 14.318 | 48 | VFQFPN |