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特性

  • Frequency range: 0.016MHz to 1500MHz
  • Output Types: LVDS, LVPECL, HCSL, LVCMOS
  • Supply Voltage: 1.8V, 2.5V, or 3.3V
  • Phase Jitter (12kHz to 20MHz): 300fs typical (400fs max)
  • Package options:
    • 5.0mm x 3.2mm x 1.2mm
    • 7.0mm x 5.0mm x 1.3mm
  • Frequency stability: ± 20ppm, ± 25ppm, ± 50ppm, or ± 100ppm
    • Operating temperatures: -20 °C to +70 °C
  • Frequency stability: ± 25ppm, ± 50ppm, or ± 100ppm
    • Operating temperatures: -40 °C to +85 °C
  • Frequency stability: ± 50ppm, or ± 100ppm
    • Operating temperatures:  -40 °C to +105 °C

描述

The XU is a quartz-based PLL clock oscillator family with <400fs phase jitter, supporting a wide range of frequencies, input voltages, and output types. These devices are designed to operate at three different power supplies and are available in multiple package sizes as well as temperature grades.

With a patented one-time program (OTP) allowing for infinite memory shelf life, the XU devices can be programmed to generate an output frequency from 16kHz to 1500MHz with a resolution as low as 1Hz accuracy. The configuration capability of this family of devices allows for fast delivery times for both sample and large production orders.

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产品参数

属性
Function XO
Output Type HCMOS, LVDS, LVPECL, HCSL
Output Freq Range (MHz) 0.75 - 1350
Supply Voltage (V) 3.3 - 3.3, 2.5 - 2.5, 1.8 - 1.8
Phase Jitter Max RMS (ps) 0.4
Freq. Stability Total (± PPM) 20, 25, 50, 100
Temp. Range (°C) -20 to +70, -40 to +85, -40 to +105

封装选项

Lead Count (#)
6

应用方框图

Genoa Server Block Diagram
AMD 第四代 EPYC(Genoa)电源和定时系统
适用于 AMD Genoa 的完整电源和时序系统,支持 SVI3、DDR5 和 PCIe Gen 5/6。
System on Module (SoM) Block Diagram
RZ/G2E 电源和时序系统级模块
电源和时序系统级模块(SoM)确保精确的时序和高效的功率分配。
此为出厂可配置设备。试用自定义部件配置工具

当前筛选条件

IDT provides a brief overview of the timing solutions optimized for various configurations using the NXP (Freescale) QorIQ / Layerscape processors.

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