概览

描述

This is the evaluation kit for the RC32504A and RC22504A point-of-use jitter attenuator and clock generators.  The board comes populated with an RC32504A device. The RC22504A is functionally a subset of the RC32504A, so this board can be used to evaluate either, or both, of the devices. Refer to the device pages for additional details on the products.

特性

  • Jitter below 100fs RMS (10kHz to 20MHz)
  • Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)
  • PLL core consists of fractional-feedback Analog PLL (APLL) which can optionally be steered by a Digital PLL (DPLL)
    • Operates from a 25MHz to 80MHz crystal or XO
    • APLL frequency independent of input/crystal frequency
    • Operates as a frequency synthesizer, jitter attenuator, synchronous equipment slave clock or Digitally Controlled Oscillator (DCO)
    • DPLL loop filter programmable from 0.1Hz to 12kHz
    • DCO has tuning granularity of < 1ppb
  • Programmable input buffer supports HCSL, LVDS, or two LVCMOS with no external terminations needed
    • Input frequencies: 1MHz to 800MHz (250MHz for LVCMOS)
    • Reference monitor qualifies/disqualifies input clock
  • Programmable status output
  • 4 differential/8 LVCMOS outputs
    • Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
    • Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or two LVCMOS
    • Differential output swing is selectable: 400mV to 800mV
    • Output clock phase individually adjustable in 100ps steps
    • Output Enable input with programmable effect
  • Supports up to 1MHz I2C or up to 20MHz SPI serial processor port
  • Can configure itself automatically after reset through internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations
     

文档

文档标题 类型 日期
PDF1.28 MB
手册 - 开发工具
PDF377 KB
应用文档
PDF80 KB
指南
PDF1.22 MB
手册 - 软件

设计和开发

软件与工具

软件与工具

瑞萨电子集成电路工具箱 (RICBox)借助瑞萨集成电路工具箱 (RICBox) 软件平台,客户可在连接到运行该软件的计算机时,将瑞萨设备配置到评估套件上。 Software Package 瑞萨电子

支持

视频和培训

Lab on the Cloud Demo for Femtoclock®2 Ultra-Low Phase Noise Synthesizer and Jitter Attenuator

Demonstration of Renesas’ Lab on the Cloud virtual environment for Femtoclock®2 ultra-low phase noise synthesizer and jitter attenuator.

图像
Lab on the Cloud

云上的瑞萨实验室

云上的瑞萨实验室是一个在线环境,其中的瑞萨解决方案托管在客户能在线访问和测试的远程实验室中,包括常用的评测板、成功的产品组合和软件。

FemtoClock®2 Evaluation Board

An automated system, remotely placed for users to evaluate phase noise performance of a specific clock configuration on a board using a phase noise analyzer.