时钟和时序

概览

The RC32508A regenerates and distributes ultra-low jitter clock outputs and features up to 2 independent frequency domains that can be either locked to the external reference clock or locked to a free-run crystal or oscillator. Digital PLL (DPLL) support hitless reference switching between references from redundant timing sources. The device supports multiple independent timing channels for clock generation and jitter attenuation for high-speed serial links. Input-to-input, input-to-output and output-to-output phase skew can all be precisely managed.  The device outputs ultra-low-jitter clocks that can directly synchronize SERDES running at up to 112Gbps; as well as CPRI/OBSAI, SONET/SDH ADC/DAC. The device is ideal for use in 100G/200G/400G/800G telecom switch line cards, fabric cards and OTN applications.

RC32508A - Block Diagram
RC32508A - Pin Assignment
RC32508A - Block Diagram
RC32508A - Pin Assignment
  • Can be configured as clock generator or jitter attenuator/synchronizer
  • Low power, less than 0.8W typical
  • Low jitter, less than 50fs-RMS
  • Compliant with ITU-T G.8262 & G.8262.1 option 1 and 2 for synchronous Ethernet Equipment Clock (EEC/eEEC) without degrading output jitter
  • Jitter attenuation with programmable loop bandwidth from 0.1Hz to 12kHz
  • Up to 2 independent frequency domains and 8 integer output dividers
  • Each frequency domain can be slaved with DPLL or free-run
  • DPLL can be configured as DCO
  • LVCMOS, AC-LVPECL, AC-LVDS, HCSL, AC-CML output modes supported with programmable output swing
  • Up to 2single ended or 1differential clock inputs, 1 crystal/XO/TCXO/OCXO input
  • Supports 1MHz I2C, 400kHz SMBus or 50MHz SPI serial port
  • Internal non-volatile memory (up to 8 different configurations) provides default device settings on power-up.
  • 1.8V core and output operation
  • -40° to +85°C industrial temperature operation

文档

文档标题 类型 日期
RC32508A Datasheet
PDF1.05 MB
数据手册
AN-827 Application Relevance of Clock Jitter
PDF1.99 MB
应用文档
FemtoClock 2 – Generating Synchronous Ethernet (SyncE) Clocks
PDF377 KB
应用文档
Frequency Margining with FemtoClock 2
PDF129 KB
应用文档
How to Make 1.2V LVCMOS from 1.8V LVCMOS Output
PDF256 KB
应用文档
FemtoClock2 Python Driver Setup
PDF433 KB
应用文档
AN-831 The Crystal Load curve
PDF395 KB
应用文档
AN-844 Termination - AC Coupling Clock Receivers
PDF170 KB
应用文档
AN-842 Thermal Considerations in Package Design and Selection
PDF495 KB
应用文档
AN-840 Jitter Specifications for Timing Signals
PDF442 KB
应用文档
AN-838 Peak-to-Peak Jitter Calculations
PDF115 KB
应用文档
AN-839 RMS Phase Jitter
PDF233 KB
应用文档
AN-832 Timing Budget and Accuracy
PDF131 KB
应用文档
AN-833 Differential Input Self Oscillation Prevention
PDF180 KB
应用文档
AN-835 Differential Input with VCMR being VIH Referenced
PDF160 KB
应用文档
AN-836 Differential Input to Accept Single-ended Levels
PDF120 KB
应用文档
AN-830 Quartz Crystal Drive Level
PDF143 KB
应用文档
AN-815 Understanding Jitter Units
PDF565 KB
应用文档
AN-802 Crystal-Measuring Oscillator Negative Resistance
PDF136 KB
应用文档
AN-801 Crystal-High Drive Level
PDF202 KB
应用文档
AN-805 Recommended Ferrite Beads
PDF121 KB
应用文档
AN-806 Power Supply Noise Rejection
PDF438 KB
应用文档
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products
PDF108 KB
应用文档
RC32508A Programming Guide
PDF1.33 MB
指南
FemtoClock2 Debug Guide
PDF80 KB
指南
Renesas IC Toolbox Software Manual
PDF1.53 MB
手册 - 软件
FemtoClock®2 GUI User Guide
PDF1.22 MB
手册 - 软件
Timing Solutions Products Overview
PDF906 KB
概览

设计和开发

软件与工具

瑞萨电子集成电路工具箱 (RICBox)借助瑞萨集成电路工具箱 (RICBox) 软件平台，客户可在连接到运行该软件的计算机时，将瑞萨设备配置到评估套件上。 Software Package 瑞萨电子

开发板与套件

RC32508A-EVK

评估
立即订购

FemtoClock™ 2 Evaluation Kit

This is the evaluation kit for the RC32508A jitter attenuator and clock generator.  The board comes populated with an RC32508A device.

ECAD 模块

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

扩展 ECAD 模块

产品选择

    Processing table
    器件号
    Pkg. Type
    Lead Count (#)
    Temp. Range
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    购买 / 样片
    RC32508A000GNE#BB0
    play_circleActive
    memory
    view_in_ar
    可提供样品
    		 VFQFPN 48 -40 to 85°C I Yes Tray
    RC32508A000GNE#KB0
    play_circleActive
    memory
    view_in_ar
    		VFQFPN 48 -40 to 85°C I Yes Reel
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    视频和培训

    Lab on the Cloud Demo for Femtoclock®2 Ultra-Low Phase Noise Synthesizer and Jitter Attenuator

    Demonstration of Renesas’ Lab on the Cloud virtual environment for Femtoclock®2 ultra-low phase noise synthesizer and jitter attenuator.

    Video List