概览

描述

The RC32514A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs. The RC32514A can act as a frequency synthesizer to locally generate the reference clock, a jitter attenuator to perform local clean-up and/or frequency translation of a centrally-supplied reference, a synchronous Ethernet equipment clock to perform passband filtering and clean-up of network-supplied references or as a DCO for frequency margining or OTN clock applications.  It contains an internal crystal which can be leveraged as the frequency reference for the onboard PLL if desired.

特性

  • Jitter below 100fs RMS (10kHz to 20MHz)
  • Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)
  • PLL core consists of fractional-feedback Analog PLL (APLL) which can optionally be steered by a Digital PLL (DPLL)
    • Operates from an internal crystal
    • APLL frequency independent of input/crystal frequency
    • Operates as a frequency synthesizer, jitter attenuator, synchronous equipment slave clock or Digitally Controlled Oscillator (DCO)
    • DPLL loop filter programmable from 0.1Hz to 12kHz
    • DCO has tuning granularity of < 1ppb
  • Programmable input buffer supports HCSL, LVDS, or two LVCMOS with no external terminations needed
    • Input frequencies: 1MHz to 800MHz (250MHz for LVCMOS)
    • Reference monitor qualifies/disqualifies input clock
  • Programmable status output
  • 4 differential/8 LVCMOS outputs
    • Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
    • Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or two LVCMOS
    • Differential output swing is selectable: 400mV to 800mV
    • Output clock phase individually adjustable in 100ps steps
    • Output Enable input with programmable effect
  • Supports up to 1MHz I2C or up to 20MHz SPI serial processor port
  • Can configure itself automatically after reset through internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations
  • 4 × 4 mm 28-VFQFPN package

文档

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指南
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手册 - 软件
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手册 - 软件
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概览
PDF63 KB
原理图

设计和开发

软件与工具

软件与工具

瑞萨电子集成电路工具箱 (RICBox)借助瑞萨集成电路工具箱 (RICBox) 软件平台,客户可在连接到运行该软件的计算机时,将瑞萨设备配置到评估套件上。 Software Package 瑞萨电子

开发板与套件

开发板与套件

模块

模块

Title Type Date
模型 - IBIS

支持

视频和培训

Lab on the Cloud Demo for Femtoclock®2 Ultra-Low Phase Noise Synthesizer and Jitter Attenuator

Demonstration of Renesas’ Lab on the Cloud virtual environment for Femtoclock®2 ultra-low phase noise synthesizer and jitter attenuator.