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快速 CMOS TTL 兼容 (FCT)
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Renesas 的快速 CMOS 技术 (FCT) 逻辑系列专为用于标准 TTL 逻辑应用而设计。 我们的快速 CMOS 器件具有目前市面上最高的逻辑速度和业内最低的功耗。 快速 CMOS 系列由各种产品组成，其中包括总线接口、缓冲器、多路复用器、收发器和其他器件。 我们提供两种可用输出配置，即行业标准高驱动和低噪声平衡驱动。 所有器件均具有多个速度等级。
关于快速 CMOS 锁存器和透明锁存器
基本的 CMOS 锁存器电路拥有两个输入（SET 和 RESET）和一个输出。 器件可提供高电平或低电平两种形式，并决定了将由逻辑高电平还是逻辑低电平信号来触发 CMOS 锁存器。CMOS 锁存器的目的是监控 SET 输入，并且一旦触发就会改变并保持输出状态，直至其被 RESET 输入重置。 换句话说，CMOS 锁存器在检测到 SET 引脚的状态发生变化时（哪怕只是一小会）锁定为“开”，并将一直保持“开”状态直至检测到 RESET 引脚的状态发生变化。
CMOS 锁存器被设计为透明锁存器的原因在于，它们可在从低转至高（或高转至低，取决于架构）时允许输出参照输入。 因此，当几个透明锁存器彼此参照（使用相同的输入信号）时，这些信号可以通过所有锁存器同时传播。 Renesas 的低功耗快速 CMOS 锁存器是临时数据存储的理想之选。 它们可用于实施存储器地址锁存器、I/O 端口和总线驱动器。
请注意，CMOS 锁存器类似于触发器，但“锁存器”一词主要用于存储元件，而时钟器件则被称为“触发器”。” 此外，锁存器通常由电压电平触发，而触发器则通常由电压变化（或边缘）触发。 也就是说，锁存器在启用时变成透明，而触发器的输出则仅在单一类型（正向或负向）的时钟脉冲边沿发生变化。
关于八进制路缓冲器
八进制缓冲器是包含八个相同缓冲器的标准逻辑器件。 高阻抗输入可显著减少输入驱动程序的电流负载，而八进制缓冲器输出则提供了更出色的驱动力和交换噪声性能。 Renesas 的八进制缓冲器（线路驱动器）采用先进的双金属快速 CMOS 技术打造而成，可用作存储器、地址驱动器、时钟驱动器或总线用发射器/接收器以增加电路板密度。
产品选型表
Processing table
Function |
Pkg. Code |
Temp. Range |
Bus Width (bits) |
Core Voltage (V) |
Output Type |
Speed Grade |
105°C Max. Case Temp. |
|
|---|---|---|---|---|---|---|---|---|
| 器件号 | ||||||||
| 16-Bit Buffer/Line Driver | Buffer/Driver | CS48 | -55 to 125°C | 16 | 5 | A, C | ||
| 16-Bit Bi-Directional Transceiver | Transceiver | CS48 | -55 to 125°C | 16 | 5 | A, C | ||
| 16-Bit Buffer/Line Driver | Buffer/Driver | PVG48 | -40 to 85°C | 16 | 5 | A, C, E | ||
| 16-Bit Bi-Directional Transceiver | Transceiver | PAG48, PVG48 | -40 to 85°C | 16 | 5 | A, C, E | ||
| 18-Bit Register | Register | PVG56 | -40 to 85°C | 18 | 5 | C | ||
| 3.3V 16-Bit Buffer/Line Driver | Buffer/Driver | PAG48, PVG48 | -40 to 85°C | 16 | 3.3 | A, C | ||
| 3.3V 16-Bit Transceiver | Transceiver | PAG48 | -40 to 85°C | 16 | 3.3 | C | ||
| 3.3V 16-Bit Register (3-State) | Register | PAG48 | -40 to 85°C | 16 | 3.3 | 3-state | A, C | |
| 16-Bit Register (3-State) | Register | PVG48 | -40 to 85°C | 16 | 5 | 3-state | A, C, E | |
| 3.3V TO 5.0V 16-Bit Translating Transceiver | Other | PAG48, PVG48 | -40 to 85°C | 16 | 3.3 | Standard | ||
| Octal Buffer/Line Driver | Buffer/Driver | PSG20 | -40 to 85°C | 8 | 5 | A, C | ||
| Octal Bi-Directional Transceiver | Transceiver | PSG20 | -40 to 85°C | 8 | 5 | A, C | ||
| Octal Transparent Latch | Transparent Latch | PCG20 | -40 to 85°C | 8 | 5 | A, C | ||
| Octal Buffer/Line Driver | Buffer/Driver | PSG20 | -40 to 85°C | 4 | 5 | C | ||
| Fast CMOS Octal Buffer/Line Driver | Buffer/Driver | PCG20, PSG20 | -40 to 85°C | 4 | 5 | A, C | ||
| Octal Bi-Directional Transceiver | Transceiver | PCG20, PSG20 | -40 to 85°C | 4 | 5 | A, C | ||
| 3.3V Octal Buffer/Line Driver | Buffer/Driver | PCG20, PSG20 | -40 to 85°C | 8 | 3.3 | A, Standard | ||
| 3.3V Octal Bi-Directional Transceiver | Transceiver | PGG20 | -40 to 85°C | 8 | 3.3 | A, Standard | ||
| Octal Transparent Latch | Transparent Latch | PSG20 | -40 to 85°C | 8 | 5 | A, C | ||
| Octal D Register | Register | PSG20 | -40 to 85°C | 8 | 5 | A, C | ||
| 8-Bit Identity Comparator | Comparator | PCG20, PSG20 | -40 to 85°C | 8 | 5 | A, C | ||
| Octal Latched Transceiver | Transceiver | PCG24 | -40 to 85°C | 8 | 5 | A, C | ||
| Octal Transparent Latch | Latch | PSG20 | -40 to 85°C | 8 | 5 | A, C | ||
| Octal Bus Transceiver (Open-Drain) | Transceiver | PSG20 | -40 to 85°C | 8 | 5 | A, Standard | ||
| Octal Bus Transceivers (with 3-state outputs) | Octal Bus Transceivers with 3-state outputs | -40 to 85°C | ||||||
| Octal D-Type Transparent Latches (3-State Outputs) Octal D-Type Transparent Latches (Inverted 3-State Outputs) | Octal D-type Transparent Latches with 3-state output | -40 to 85°C | ||||||
| Octal Buffers/Line Drivers (with 3-state outputs) | Octal Buffers and Line Drivers with 3-state outputs | -40 to 85°C | ||||||
| Octal D-Type Flip-Flops (with 3-state outputs) Octal D-Type Flip-Flops (with inverted 3-state outputs) | Octal D-type Flip-Flops with 3-state output | -40 to 85°C | ||||||
| Octal D-Type Transparent Latches (with three-state outputs) | Octal D-type Transparent Latches with Non-inverted 3-state output | -20 to 75°C |
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