封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | QSOP |
| Pkg. Code: | PCG20 |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 8.7 x 3.8 x 1.47 |
| Pitch (mm): | 0.64 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
产品属性
| Lead Count (#) | 20 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Input Freq (MHz) | 12 - 25 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 55 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Accepts Spread Spec Input | No |
| Core Voltage (V) | 3.3V, 5V |
| Die Form | No |
| Feedback Input | No |
| Input Type | Crystal, LVCMOS |
| Inputs (#) | 4 |
| Length (mm) | 8.7 |
| MOQ | 165 |
| Output Banks (#) | 3 |
| Output Freq Range (MHz) | 0 - 0 |
| Output Type | LVCMOS |
| Output Voltage (V) | 3.3V, 5V |
| Outputs (#) | 7 |
| Package Area (mm²) | 33.1 |
| Period Jitter Typ P-P (ps) | 150 |
| Pitch (mm) | 0.64 |
| Pkg. Dimensions (mm) | 8.7 x 3.8 x 1.47 |
| Pkg. Type | QSOP |
| Prog. Clock | No |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Supply Voltage (V) | 0 - 0 |
| Tape & Reel | No |
| Thickness (mm) | 1.47 |
| Width (mm) | 3.8 |
| Xtal Freq (KHz) | 14.32 - 14.32 |
| Xtal Inputs (#) | 1 |
| 已发布 | No |
有关 650-07 的资源
描述
The 650-07 is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25.00 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs. The 650-07 outputs all have 0 ppm synthesis error.