概览
描述
The 650-12 is a low cost, low-jitter, high-performance clock synthesizer designed to produce fixed clock outputs of 13.5 MHz and 27.0 MHz, and four selectable clock outputs: two Processor Clocks (PCLK1) and PCLK2), an Audio Clock, and a Communications Clock (CCLK). Using analog Phase-Locked Loop (PLL) techniques, the device uses a 27.0 MHz clock or fundamental crystal to produce clocks ideal for Digital Video/MPEG-based applications.
特性
- Packaged in 20-pin tiny SSOP (QSOP)
- RoHS 5 (green) or RoHS 6 (green and lead free)compliant package
- Input frequency of 27.0 MHz
- Zero ppm synthesis error in output clocks
- Provides fixed 13.5 MHz and 27.0 MHz. Also provides two selectable processor clocks, one audio clock, and one communications clock.
- Ideal for digital video MPEG-based applications
- 3.3 V or 5.0 V operating voltage
- Entire chip powers down (when CS1=CS0=0)
产品对比
应用
设计和开发
模型
ECAD 模块
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