封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | SSOP |
| Pkg. Code: | PVG56 |
| Lead Count (#): | 56 |
| Pkg. Dimensions (mm): | 18.4 x 7.5 x 2.3 |
| Pitch (mm): | 0.64 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
产品属性
| Lead Count (#) | 56 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| App Jitter Compliance | Stratum 3, Stratum 4, Stratum 4E, SMC, ITU, Telcordia |
| Input Freq (MHz) | 0.002 - 32.768 |
| Outputs (#) | 12 |
| Output Freq Range (MHz) | 0.008 - 32.768 |
| Qty. per Reel (#) | 1000 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| Core Voltage (V) | 3.3 |
| Diff. Input Signaling | 3.3 |
| Function | WAN PLL |
| Input Type | LVCMOS |
| Inputs (#) | 2 |
| Length (mm) | 18.4 |
| MOQ | 1000 |
| Multiply/Divide Value | 1 |
| Operating Freq | 32.768 |
| Output Signaling | LVCMOS |
| Output Type | LVCMOS |
| Output Voltage (V) | 3.3 |
| Package Area (mm²) | 138 |
| Pitch (mm) | 0.64 |
| Pkg. Dimensions (mm) | 18.4 x 7.5 x 2.3 |
| Pkg. Type | SSOP |
| Price (USD) | $43.08912 |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3 - 5.5 |
| Tape & Reel | Yes |
| Thickness (mm) | 2.3 |
| Width (mm) | 7.5 |
| 已发布 | No |
有关 82V3002A 的资源
描述
The 82V3002A is a WAN PLL with dual reference inputs. It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference. The 82V3002A provides eight types of clock signals (C1.5o, C3o, C6o, C2o, C4o, C8o, C16o, C32o) and six types of framing signals (F0o, F8o, F16o, F32o, RSP, TSP) for the multitrunk T1 and E1 primary rate transmission links. The 82V3002A is compliant with AT&T TR62411, Telcordia GR- 1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4, ETSI ETS 300 011, ITU-T G.813 Option 1 for 2048 kbit/s interface, and ITU-T G.812 Type IV clocks for 1544 kbit/s interface and 2048 kbit/s interface. It meets the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/wander, frequency accuracy, capture range, phase change slope, holdover frequency accuracy and MTIE (Maximum Time Interval Error) requirements for these specifications. The 82V3002A can be used in synchronization and timing control for T1 and E1 systems, or used as ST-BUS clock and frame pulse sources. It can also be used in access switch, access routers, ATM edge switches, wireless base station controllers, or IADs (Integrated Access Devices), PBXs and line cards.