封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG24 |
| Lead Count (#): | 24 |
| Pkg. Dimensions (mm): | 7.8 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
产品属性
| Lead Count (#) | 24 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 62 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Advanced Features | Programmable Clock |
| C-C Jitter Max P-P (ps) | 25 |
| Core Voltage (V) | 3.3 |
| Feedback Input | No |
| Input Freq (MHz) | 19.44 - 19.44, 25 - 25 |
| Input Type | Crystal |
| Inputs (#) | 1 |
| Length (mm) | 7.8 |
| MOQ | 62 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 155.52 - 155.52, 156.25 - 156.25 |
| Output Skew (ps) | 30 |
| Output Type | HCSL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 4 |
| Package Area (mm²) | 34.3 |
| Phase Jitter Typ RMS (ps) | 0.691 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 7.8 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Prog. Clock | Yes |
| Prog. Interface | I2C |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
| 已发布 | No |
有关 841S104I-02 的资源
描述
The 841S104I-02 is a PLL-based clock synthesizer specifically designed for Ethernet and SONET™ Clock applications. This device generates either a 156.25MHz or 155.52MHz differential HCSL clock from an input reference of either 25MHz or 19.44MHz. The input reference may be derived from an external source or by the addition of a 25MHz or a 19.44MHz crystal to the on-chip crystal oscillator. An external reference may be applied to the XTAL_IN pin with the XTAL_OUT pin left floating. An I2C bus interface is used to enable or disable each individual clock output. The 841S104I-02 is available in a lead-free 24-Lead package.