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Differential-to-LVDS Buffer/Divider with Internal Termination

封装信息

CAD 模型:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG16
Lead Count (#):16
Pkg. Dimensions (mm):3.0 x 3.0 x 1.0
Pitch (mm):0.5

环境和出口类别

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)3
ECCN (US)
HTS (US)

产品属性

Pkg. TypeVFQFPN
Lead Count (#)16
Pb (Lead) FreeYes
Carrier TypeTray
Additive Phase Jitter Typ RMS (fs)150
Additive Phase Jitter Typ RMS (ps)0.15
Adjustable PhaseNo
Channels (#)1
Core Voltage (V)2.5V, 3.3V
Divider Value2, 4, 8, 16
FunctionBuffer, Divider
Input Freq (MHz)0 - 0
Input TypeCML, LVDS, LVPECL
Inputs (#)1
Length (mm)3
MOQ200
Moisture Sensitivity Level (MSL)3
Output Banks (#)1
Output Freq Range (MHz)2000
Output Skew (ps)30
Output TypeLVDS
Output Voltage (V)2.5V, 3.3V
Outputs (#)3
Package Area (mm²)9
Pb Free Categorye3 Sn
Pitch (mm)0.5
Pkg. Dimensions (mm)3.0 x 3.0 x 1.0
Qty. per Carrier (#)624
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Supply Voltage (V)2.38 - 2.38, 2.63 - 2.63
Tape & ReelNo
Temp. Range (°C)-40 to 85°C
Thickness (mm)1
Width (mm)3
已发布No

描述

The 8S89872 is a high-speed Differential-to-LVDS Buffer/Divider with Internal Termination. The 8S89872 has a selectable ÷2, ÷4, ÷8, ÷16 output dividers. The clock input has internal termination resistors allowing it to interface with several differential signal types while minimizing the number of required external components. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards.