瑞萨电子 (Renesas Electronics Corporation)
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8T49N1012

过时

FemtoClock NG 12-Output Frequency Synthesizer

特性

  • 0.3ps RMS typical jitter (including spurs), 12kHz to 20MHz
  • Operating modes: locked to input signal and free-run
    • Digitally Controlled Oscillator (DCO) mode for software adjustment of operating frequency
  • Operates from a 10MHz to 40MHz fundamental-mode crystal
  • Accepts one LVPECL, LVDS, LVHSTL, HCSL, or LVCMOS input clock
    • Accepts frequencies ranging from 10MHz up to 600MHz
    • Clock input monitoring
  • Generates 12 LVPEC/LVDS/HCSL or 24 LVCMOS output clocks
    • Output frequencies ranging from 8kHz up to 1.0GHz (diff)
    • Output frequencies ranging from 8kHz up to 250MHz (LVCMOS)
  • Two Output Enable control inputs
  • Lock and Loss-of-Signal status outputs
  • Programmable output de-skew adjustments in steps as small as 16ps
  • Register programmable through I²C or via external I²C EEPROM
  • Bypass clock paths and reference output for system tests
  • -40 °C to +85 °C ambient operating temperature
  • Packaged in a 72-pin QFN, lead-free RoHS (6)
  • Supported by Renesas' Timing Commander Software
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8T49N1012 Block Diagram
8T49N1012 Pinout
8T49N1012 Block Diagram
8T49N1012 Pinout

描述

The 8T49N1012 has one fractional-feedback PLL that can be used for frequency synthesis. It is equipped with two integer and eight fractional output dividers, allowing the generation of up to ten different output frequencies, ranging from 8kHz to 1GHz. Eight of these frequencies are completely independent of each other and the inputs. Two more are related frequencies. The twelve outputs may select among LVPECL, LVDS, HSCL, or LVCMOS output levels.

This functionality makes it ideal to be used in any frequency synthesis application, including 1G, 10G, 40G, and 100G Synchronous Ethernet, OTN, and SONET/SDH, including ITU-T G.709 (2009) FEC rates. The device supports Output Enable inputs and Lock and LOS status outputs.

此为出厂可配置设备。
试用自定义部件配置工具。

应用

  • OTN or SONET/SDH equipment line cards (up to OC-192, and supporting FEC ratios)
  • Gigabit and Terabit IP switches/routers
  • Wireless base station baseband
  • Data communications
此为出厂可配置设备。
试用自定义部件配置工具。

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Description

Overview of IDT's third generation Universal Frequency Translator (UFT) family of timing devices for high-performance optical networks, wireless base stations, and 100 Gigabit Ethernet (GbE) interface applications. The new UFT devices are the industry's only single-chip programmable solutions capable of generating eight different output frequencies with less than 300 femtoseconds RMS phase jitter over the standard 12 kHz to 20 MHz integration range.
 
The IDT 8T49N28x UFT family of timing devices offers eight independently programmable clocking outputs with the flexibility to apply virtually any input frequency and select virtually any output frequency. The devices' high level of integration and low jitter eliminates the need for separate frequency translation, redundancy management, and jitter attenuation devices -- empowering system designers to save cost and board area by consolidating those functions into a single device. In addition, the device offers significant flexibility in configuration and ease of programmability with IDT's Timing Commander software, making it useful in a variety of sockets and modes of operation with minimal design effort.
 
Presented by Ian Dobson, Director of System Architecture at IDT. Visit the Universal Frequency Translators page for information.
 

新闻和博客

博客
2021年4月27日
Benefits of a Point-of-Use Clock for Jitter Optimization
新闻
2016年5月24日
New Addition to IDT’s FemtoClock Family Delivers Unparalleled Frequency Flexibility for Complex Timing Networks
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