概览
描述
The ADC1113D is a dual channel 11-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1113D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3 V source for analog and a 1.8 V source for the output driver, it has two serial outputs, which are compliant with the JESD204A standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC.
特性
- 2 configurable serial outputs
- 3 V, 1.8 V single supplies
- Compliant with JESD204A serial transmission standard
- Dual channel 11-bit pipelined ADC core
- Duty cycle stabilizer
- Flexible input voltage range: 1 V (p-p) to 2 V (p-p)
- High IF capability
- HVQFN56 package
- Input bandwidth, 600 MHz
- Offset binary, 2's complement, gray code
- Pin compatible with the ADC1213D series, ADC1413D series and the ADC1613D
- series
- Power-down and Sleep modes
- SNR, 67 dBFS
- SFDR, 90 dBc
- SPI interface
产品对比
应用
设计和开发
开发板与套件
演示
ADC1113D125W1 demo board
IDT's ADC demo board is suitable for dynamic performance evaluations from low to high IF configuration. The FPGA eases the evaluation and analysis of the ADC dynamic and enables use of the full JESD204A feature set.
演示
ADC1113D125WO demo board; compliant with Lattice, Altera, Xilinx FPGA boards through specific connectors
Our ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration. A FPGA mother board (Xilinx, Altera, and Lattice) could be connected to ease the evaluation and analysis of the ADC dynamic and enable usage of the JESD204A full features sets
模型
ECAD 模块
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