概览
描述
The ADC1412D125HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 125 Msps. Pipelined architecture and output error correction ensure the ADC1412D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage Differential Signaling) DDR (Double Data Rate) output standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC. The device also includes a programmable gain amplifier with a flexible input voltage range.
特性
- CMOS or LVDS DDR digital outputs
- Dual-channel14-bit pipelined ADC core
- Duty cycle stabilizer
- Fast OTR detection
- Flexible input voltage range: 1 V to 2 V (p-p) with 6 dB programmable fine
- gain
- INL ±
- 1 LSB, DNL ±
- 0.5 LSB (typical)
- Input bandwidth, 650 MHz
- Offset binary, 2's complement, gray code
- Power dissipation, 775 mW at 80 Msps
- Power-down and Sleep modes
- Sample rate up to 125 Msps
- SFDR, 90 dBc
- Single 3 V supply
- SNR, 73 dB
- SPI Interface
产品对比
应用
设计和开发
开发板与套件
演示
ADC1412D125F1 demo board; CMOS version; SPI, Regulators and CMOS buffer on board
IDT's dual channel ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration with LVCMOS outputs. A Data acquisition board can be used to easily analyze the ADC performances in the design and prototyping phase
Recommended Documents:
演示
ADC1412D125F2 demo board; LVDS version; SPI, Regulators and LVDS outputs on board
IDT's dual channel ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration with LVDS DDR outputs. A Data acquisition board can be used to easily analyze the ADC performances in the design and prototyping phase.
Recommended Documents:
模型
ECAD 模块
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