封装信息
| Lead Count (#) | 16 |
| Pkg. Type | CFP |
| Pkg. Code | KBT |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 10.41 x 6.86 x 0.00 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pb (Lead) Free | Exempt |
| ECCN (US) | 9A515 |
| HTS (US) |
产品属性
| Pkg. Type | CFP |
| Lead Count (#) | 16 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | Not Applicable |
| DLA SMD | 5962F9956005VXC |
| Pb (Lead) Free | Exempt |
| Pb Free Category | Gold Plate over compliant Undercoat-e4 |
| MOQ | 25 |
| Temp. Range | -55 to +125°C |
| CAGE code | 34371 |
| DSEE (MeV·cm2/mg) | 60 |
| Die Sale Availability? | Yes |
| Driver Type | Low Side |
| Drivers (#) | 2 |
| FET Type | MOSFET |
| Fall Time | 75 |
| Flow | RH Hermetic |
| Input VCC (Max) (V) | 18 |
| Input VCC (Min) (V) | 8 |
| Length (mm) | 10.4 |
| Low Side Fall Time (max) (ns) | 75 |
| Low Side Rise Time (max) (ns) | 75 |
| Output Type | Non-inverting |
| PROTO Availability? | Yes |
| Peak Output Current IPK (A) | 2 |
| Peak Output Sink Current (A) | 2 |
| Peak Output Source Current (A) | 2 |
| Pitch (mm) | 1.3 |
| Pkg. Dimensions (mm) | 10.4 x 6.9 x 0.00 |
| Qualification Level | Class V |
| Rating | Space |
| Rise Time (Max) | 75 |
| SMD URL | |
| TID HDR (krad(Si)) | 300 |
| Thickness (mm) | 0 |
| Width (mm) | 6.9 |
描述
The radiation hardened HS-4424 family are noninverting, dual, monolithic high-speed MOSFET drivers designed to convert low voltage control input signals into higher voltage, high current outputs. The HS-4424DRH, HS-4424DEH are fully tested across the 8V to 18V operating range. The inputs of these devices can be directly driven by the HS-1825ARH PWM device or by our ACS/ACTS and HCS/HCTS type logic devices. The fast rise times and high current outputs allow very quick control of high gate capacitance power MOSFETs in high-frequency applications. The high current outputs minimize power losses in MOSFETs by rapidly charging and discharging the gate capacitance. The output stage incorporates a low voltage lockout circuit that puts the outputs into a three-state mode when the supply voltage is below its Undervoltage Lockout (UVLO) threshold voltage. Constructed with Intersil’s dielectrically isolated Rad Hard Silicon Gate (RSG) BiCMOS process, these devices are immune to single event latch-up and have been specifically designed to provide highly reliable performance in harsh radiation environments.