封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | SOICW |
| Pkg. Code: | MWW |
| Lead Count (#): | 28 |
| Pkg. Dimensions (mm): | 17.93 x 7.52 x 0.20 |
| Pitch (mm): | 1.27 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | |
| Pb (Lead) Free | No |
| ECCN (US) | |
| HTS (US) |
产品属性
| Pkg. Type | SOICW |
| Carrier Type | Tube |
| MOQ | 52 |
| Data | 24 Bits |
| Filter Subtype | HB FIR |
| Lead Count (#) | 28 |
| Length (mm) | 17.9 |
| Pb (Lead) Free | No |
| Pitch (mm) | 1.3 |
| Pkg. Dimensions (mm) | 17.9 x 7.5 x 0.20 |
| Qualification Level | Standard |
| Temp. Range (°C) | 0 to +70°C |
| Thickness (mm) | 0.2 |
| Width (mm) | 7.5 |
有关 HSP43124 的资源
描述
Support is limited to customers who have already adopted these products.
The Serial I/O Filter is a high performance filter engine that is ideal for off loading the burden of filter processing from a DSP microprocessor. It supports a variety of multistage filter configurations based on a user programmable filter and fixed coefficient halfband filters. These configurations include a programmable FIR filter of up to 256 taps, a cascade of from one to five halfband filters, or a cascade of halfband filters followed by a programmable FIR. The half band filters each decimate by a factor of two, and the FIR filter decimates from one to eight. When all six filters are selected, a maximum decimation of 256 is provided. For digital tuning applications, a separate multiplier is provided which allows the incoming data stream to be multiplied, or mixed, by a user supplied mix factor. A two pin interface is provided for serially loading the mix factor from an external source or selecting the mix factor from an on-board ROM. The on-board ROM contains samples of a sinusoid capable of spectrally shifting the input data by one quarter of the sample rate, FS/4. This allows the chip to function as a digital down converter when the filter stages are configured as a low-pass filter. The serial interface for 3- input and output data is compatible with the serial ports of common DSP microprocessors. Coefficients and configuration data are loaded over a bidirectional eight bit interface.