封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | PDIP |
| Pkg. Code: | EWG |
| Lead Count (#): | 14 |
| Pkg. Dimensions (mm): | 19.05 x 6.60 x 3.94 |
| Pitch (mm): | 2.54 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| RoHS (ICM7556IPDZ) | 下载 |
产品属性
| Lead Count (#) | 14 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pb (Lead) Free | Yes |
| Pb Free Category | Pb-Free 100% Matte Tin Plate w/Anneal-e3 |
| Temp. Range (°C) | -40 to +85°C |
| Frequency Range (MHz) | 1.0E-6 - 1 |
| IS (mA) | 0.04 |
| Length (mm) | 19 |
| MOQ | 2500 |
| Oscillator Type | RC |
| Pitch (mm) | 2.5 |
| Pkg. Dimensions (mm) | 19.0 x 6.6 x 3.94 |
| Pkg. Type | PDIP |
| Price (USD) | $0.99277 |
| Supply Voltage Vcc (Min) (V) | 2 |
| Supply Voltage Vcc Range | 2 to 18 |
| Thickness (mm) | 3.94 |
| Width (mm) | 6.6 |
有关 ICM7556 的资源
描述
The ICM7555 and ICM7556 are CMOS RC timers providing significantly improved performance over the standard SE/NE 555/556 and 355 timers, while at the same time being direct replacements for those devices in most applications. Improved parameters include low supply current, wide operating supply voltage range, low Threshold, Trigger and Reset currents, no crowbarring of the supply current during output transitions, higher frequency performance and no requirement to decouple Control Voltage for stable operation. Specifically, the ICM7555 and ICM7556 are stable controllers capable of producing accurate time delays or frequencies. The ICM7556 is a dual ICM7555, with the two timers operating independently of each other, sharing only V+ and GND. In the one shot mode, the pulse width of each circuit is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled by two external resistors and one capacitor. Unlike the regular bipolar SE/NE 555/556 devices, the Control Voltage terminal need not be decoupled with a capacitor. The circuits are triggered and reset on falling (negative) waveforms, and the output inverter can source or sink currents large enough to drive TTL loads, or provide minimal offsets to drive CMOS loads.