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VCSO Based Clock PLL

封装信息

Pkg. Type: CLCC
Pkg. Code: CG36
Lead Count (#): 36
Pkg. Dimensions (mm): 9.0 x 9.0 x 2.8
Pitch (mm): 0.6

环境和出口类别

Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090
Moisture Sensitivity Level (MSL) 1

产品属性

Pkg. Type CLCC
Lead Count (#) 36
Pb (Lead) Free Yes
Carrier Type Tube
Abs. Pull Range Min. (± PPM) 120
Core Voltage (V) 3.3
Feedback Input No
Input Freq (MHz) 10 - 700
Input Type LVCMOS, LVPECL, LVDS
Inputs (#) 2
Length (mm) 9
MOQ 57
Moisture Sensitivity Level (MSL) 1
Output Banks (#) 2
Output Freq Range (MHz) 19.5312 - 19.5312, 78.125 - 78.125, 156.25 - 156.25, 625 - 625
Output Type LVPECL
Output Voltage (V) 3.3
Outputs (#) 2
Package Area (mm²) 81
Pb Free Category e4 Au
Phase Jitter Max RMS (ps) 0.5
Phase Jitter Typ RMS (ps) 0.25
Pitch (mm) 0.6
Pkg. Dimensions (mm) 9.0 x 9.0 x 2.8
Prog. Clock No
Qty. per Carrier (#) 54
Qty. per Reel (#) 0
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Temp. Range (°C) 0 to 70°C
Thickness (mm) 2.8
Width (mm) 9
已发布 No

描述

The M2020/21 is a Voltage Controlled SAW Oscillator (VCSO) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for optical network systems supporting 2.5GB to 10GB data rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode. The M2020/21 module includes a proprietary Surface Acoustic Wave (SAW) delay line as part of the VCSO. This results in a high-frequency, high-Q, low phase noise oscillator that assures low intrinsic output jitter.