概览
描述
The M2040 is a Voltage Controlled SAW Oscillator (VCSO) based clock generator PLL designed for clock protection, frequency translation, and jitter attenuation in fault tolerant computing applications. It features dual differential inputs with two modes of input selection: manual and automatic upon clock failure. The clock multiplication ratios and output divider ratio are pin selectable. External loop components allow the tailoring of the PLL loop response.
特性
- Integrated Surface Acoustic Wave (SAW) delay line
- VCSO frequency of 500.00MHz to 533.3334MHz
* outputs VCSO frequency or half - Pin-configurable dividers
- Loss of Lock (LOL) indicator output
- Narrow bandwidth control input (NBW pin)
- Initialization (INIT) input overrides NBW at power-up
- Dual reference clock inputs support LVDS, LVPECL, LVCMOS, LVTTL
- Automatic (non-revertive) reference clock reselection upon clock failure
- Controlled PLL slew rate ensures normal system operation during reference reselection
- Acknowledge pin indicates the actively selected reference input
- Dual differential LVPECL outputs
- Low phase jitter of < 0.5ps RMS, typical (12kHz to 20MHz or 50kHz to 80MHz)
- Industrial temperature available
- Single 3.3V power supply
- Small 9mm x 9mm surface mount package
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应用
设计和开发
模型
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