| CAD 模型: | View CAD Model |
| Pkg. Type: | HFQFP |
| Pkg. Code: | pkg_11722 |
| Lead Count (#): | 256 |
| Pkg. Dimensions (mm): | 28 x 28 x 3.95 |
| Pitch (mm): |
| Moisture Sensitivity Level (MSL) | |
| RoHS (HD6417751RX200V) | 英语日文 |
| Pb (Lead) Free | Yes |
| ECCN (US) | |
| HTS (US) |
| CPU | SH-4 |
| Bit Size | 32 |
| Program Memory (KB) | 0 |
| Data Flash (KB) | 0 |
| Lead Count (#) | 256 |
| Supply Voltage (V) | 3 - 3.6 |
| Operating Freq (Max) (MHz) | 200 |
| I/O Ports | 40 |
| Timer | 32-bit x 5-ch |
| DMA | Yes |
| Ethernet | No |
| RTC | Yes |
| LVD or PVD | No |
| Temp. Range (°C) | -20 to +75 |
| Carrier Type | Tray |
| Family Name | SuperH |
| Lead Compliant | No |
| Length (mm) | 28 |
| MOQ | 1 |
| Pb (Lead) Free | Yes |
| Pkg. Dimensions (mm) | 28 x 28 x 3.95 |
| Pkg. Type | HFQFP |
| Tape & Reel | No |
| Thickness (mm) | 3.95 |
| Width (mm) | 28 |
The SH7751R is a 32-bit RISC (reduced instruction set computer) microprocessor, featuring a built-in PCI bus controller compatible with PCs and multimedia devices. & It includes the SH-4 CPU, which at the object code level is upwardly compatible with the SH-1, SH-2, and SH-3 microcomputers. The SH7751R has an instruction cache, an operand cache that can be switched between copy-back and write-through modes, a 4-entry full associative instruction TLB (table look aside buffer), and MMU (memory management unit) with 64-entry full-associative shared TLB. & The SH7751R also includes a bus state controller (BSC) that can be coupled to synchronous DRAM. Also, because of its built in functions, such as PCI bus controller, timers, and serial communications functions, required for multimedia and OA equipment, use of the SH7751R enables a dramatic reduction in system costs.