跳转到主要内容

概览

描述

The µPD48576209F1 is a 67, 108, 864-word by 9 bit, the µPD48576218F1 is a 33, 554, 432 word by 18 bit and the µPD48576236F1 is a 16, 777, 216 word by 36 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell. The µPD48576209F1, µPD48576218F1 and µPD48576236F1 integrate unique synchronous peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (CK and CK#) are latched on the positive edge of CK and CK#. These products are suitable for application which require synchronous operation, High-Speed, low voltage, high density and wide bit configuration.

特性

  • SRAM-type interface
  • Double-data-rate architecture
  • PLL circuitry
  • Cycle time: 1.875 ns @ tRC = 15 ns 2.5 ns @ tRC = 15 ns 2.5 ns @ tRC = 20 ns 3.3 ns @ tRC = 20 ns
  • Non-multiplexed addresses
  • Multiplexing option is available.
  • Data mask for WRITE commands
  • Differential input clocks (CK and CK#)
  • Differential input data clocks (DK and DK#)
  • Data valid signal (QVLD)
  • Programmable burst length: 2 / 4 / 8 (x9 / x18 / x36)
  • User programmable impedance output (25 Ω - 60 Ω)
  • JTAG boundary scan

产品对比

应用

文档

类型 文档标题 日期
数据手册 PDF 1.19 MB
应用说明 PDF 551 KB
产品变更通告 PDF 4.86 MB 日本語
宣传手册 PDF 1.79 MB
产品变更通告 PDF 3.74 MB 日本語
产品变更通告 PDF 1.46 MB 日本語
宣传手册 PDF 3.28 MB
7 items

设计和开发

模型

ECAD 模块

点击产品选项表中的 CAD 模型链接,查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用,可直接在 SamacSys 请求该符号或模型。

Diagram of ECAD Models

产品选项

当前筛选条件