概览
简介
The 72V275 is a 32K x 18 SuperSync FIFO memory with clocked read and write controls. It's a functionally compatible version of the 72275 designed to run off a 3.3V supply for very low power consumption. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate for networking, video, telecommunications, data communications and other applications that need to buffer large amounts of data.
特性
- Pin-compatible with the 72V2x5 SuperSync FIFOs
- Functionally compatible with the 5 Volt 722x5 family
- 10ns read/write cycle time (6.5ns access time)
- Fixed, low first word data latency time
- Auto power down minimizes standby power consumption
- Retransmit operation with fixed, low first word data latency time
- Empty, Full and Half-Full flags signal FIFO status
- Programmable Almost-Empty and Almost-Full flags, Easily expandable in depth and width
- Independent Read and Write clocks (permit reading and writing simultaneously)
- Available in 64-pin TQFP and STQFP packages
- Industrial temperature range (–40C to +85C) is available
文档
| Document title | Document type
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日期 日期 | |
|---|---|---|---|
| PDF 445 KB | 数据手册 | ||
| PDF 938 KB | End Of Life Notice | ||
| PDF 909 KB | End Of Life Notice | ||
| PDF 645 KB | End Of Life Notice | ||
| PDF 123 KB | 指南 | ||
| PDF 567 KB | 产品变更通告 | ||
| PDF 611 KB | 产品变更通告 | ||
| PDF 611 KB | 产品变更通告 | ||
| PDF 95 KB | 产品变更通告 | ||
| PDF 50 KB | 产品变更通告 | ||
| PDF 24 KB | 产品变更通告 | ||
| PDF 252 KB | 产品变更通告 | ||
| PDF 164 KB | 产品变更通告 | ||
| PDF 290 KB | 产品变更通告 | ||
| PDF 80 KB | 产品变更通告 | ||
| PDF 26 KB | 产品变更通告 | ||
| PDF 150 KB | 产品变更通告 | ||
| PDF 150 KB | 产品变更通告 | ||
| PDF 274 KB | 产品变更通告 | ||
| PDF 44 KB | 产品变更通告 | ||
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设计和开发
软件与工具
模型
ECAD 模块
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产品选择
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