微控制器和微处理器

概览

S5D5单片机系列适用于自动化行业中各种功能的应用程序，如可编程逻辑控制器（PLC）等。S5D5系列具备处理功能，拥有512 KB至1 MB闪存，以及384 KB SRAM，可用于各种软件包，另配备电容式触摸感应元件、全套连接套件、图形引擎、高精度数据采集模拟接口以及强化安全保障。

Synergy Software Package (SSP)

最佳化且紧密集成的适用软件套，具备可扩展最终产品复杂性并简化复杂系统级服务的商用RTOS。

下载 SSP

S5D5 Block Diagram
S5D5 Block Diagram
  • 120 MHz Arm® Cortex®-M4 CPU
  • Optimal for applications varying in functionality across the automation industry, such as programmable logic controllers (PLCs)
  • Available in a variety of packages
  • Capacitive Touch Sensing Unit
  • Full connectivity suite
  • Graphics engine
  • High precision data acquisition analog interfaces
  • Enhanced security

应用

  • 可编程逻辑控制器

文档

文档标题 类型 日期
S5D5 Microcontroller Group User's Manual
PDF22.39 MB
手册 - 硬件
S5D5 Microcontroller Group Datasheet (R01DS0317EU0130)
PDF1.31 MB
数据手册
QE for Capacitive Touch 3D Gesture Recognition Application Development Guide
PDF4.53 MB
应用文档
Capacitive Sensor Microcontrollers CTSU Capacitive Touch Electrode Design Guide Rev.2.00
PDF8.01 MB
应用文档
USBX™ Host Class Mass Storage Module Guide
PDF313 KB
相关文件：
应用文档
How to use CUnit in e² studio (CC-RX)
PDF772 KB
应用文档
How to use CUnit in e² studio (GCC for RX)
PDF998 KB
应用文档
e² studio Creating and executing build CMake project
PDF1.11 MB
应用文档
How to automate CUnit tests in e² studio and Jenkins
PDF2.26 MB
应用文档
Integrated Development Environment e² studio: How to use EGit in e² studio Rev.1.01
PDF1.79 MB
应用文档
Renesas Synergy Using QE and SSP to Develop Capacitive Touch Applications
PDF1.36 MB
应用文档
Mutual Capacitive Touch Software Application Design with Synergy S124 and S3A7 MCUs
PDF1.15 MB
相关文件：
应用文档
Self-Capacitive Touch Software Application Design with Synergy S124 and S3A7 MCUs
PDF1.39 MB
相关文件：
应用文档
Customizing a SSP Module
PDF548 KB
相关文件：
应用文档
NetX™ DHCPv6 Server Module Guide
PDF326 KB
相关文件：
应用文档
NetX™ Port Ether Module Guide
PDF568 KB
相关文件：
应用文档
NetX™, Netx Duo™ DHCP Server Module Guide
PDF262 KB
相关文件：
应用文档
Wi-Fi Framework
PDF2.79 MB
相关文件：
应用文档
Tuning the Capacitive Touch Solution
PDF1.72 MB
相关文件：
应用文档
NetX™ and NetX Duo™ FTP Client Module Guide
PDF876 KB
相关文件：
应用文档
Renesas Synergy™ Platform Pin Configurator Usage
PDF2.27 MB
应用文档
Out-of-Box (OoB) Demonstration (Blinky) Application for S1/S3/S5 Target Board Kits
PDF250 KB
相关文件：
应用文档
USBX™ CDC ACM (Device) Application for S1/S3/S5 Target Board Kits - Application Project
PDF586 KB
相关文件：
应用文档
User Button/CTSU Button Application for S1/S3/S5 Target Board Kits
PDF650 KB
相关文件：
应用文档
Software Quality Summary for SSP v1.5.0 - Application Note
PDF772 KB
应用文档
SSP Module Development Guide - Application Note
PDF736 KB
应用文档
S3A1 to S5D5 MCU Group Migration Guide - Application Note
PDF595 KB
应用文档
S3A7 to S5D5 MCU Group Migration Guide - Application Note
PDF555 KB
应用文档
Software Development Best Practices Guide for SSP Users - Application Note
PDF750 KB
应用文档
S7G2 Group MCU to S5D9 Group MCU Migration Guide - Application Note
PDF861 KB
应用文档
Renesas Synergy™ Platform Brochure
PDF3.08 MB
手册
IoT Demands New Approach to MCU-based Embedded Designs
PDF177 KB
手册
Renesas Synergy™ MCUs Build a Foundation for Groundbreaking Integrated Embedded Platform Development
PDF481 KB
手册
Renesas Synergy™ Platform Charts Revolutionary Path to Faster Microcontroller System Development for IoT and Embedded Products
PDF1.50 MB
手册
Renesas Synergy™ Software Package (SSP) Redefines Software Development for the IoT Market
PDF1021 KB
手册
Renesas Synergy™ 平台
PDF7.54 MB
传单
BASICS OF THE RENESAS SYNERGY TM PLATFORM
PDF12.20 MB
传单
Semiconductor Reliability Handbook
PDF14.70 MB
General Reliability Literature
e2 studio v7.3 or Higher Getting Started Guide
PDF5.79 MB
手册 - 开发工具
R7FS5D5XXX Reliability Report
PDF420 KB
Product Reliability Report
Target Board S5D5 (TB-S5D5) Quick Start Guide
PDF396 KB
快速入门指南
e² studio 2023-01 Release Note
PDF3.02 MB
Release Note
QE for Capacitive Touch V3.1.0 Release Note
PDF214 KB
Release Note
e² studio 2022-10 Release Note
PDF2.64 MB
Release Note
QE for Capacitive Touch V3.0.2 Release Note
PDF170 KB
Release Note
QE for Capacitive Touch V3.0.1 Release Note
PDF161 KB
Release Note
e² studio 2022-01 Release Note
PDF2.87 MB
Release Note
e² studio 2021-10 Release Note
PDF2.32 MB
Release Note
QE for Capacitive Touch V2.0.0 Release Note Rev.2.00
PDF161 KB
Release Note
QE for Capacitive Touch[RA,RL78,Synergy] V1.4.1 Release Note
PDF146 KB
Release Note
e² studio 2021-07 Release Note
PDF3.00 MB
Release Note
QE for Capacitive Touch[RA,RL78,Synergy] V1.4.0 Release Note
PDF172 KB
Release Note
S5D5 MCU Group, S5D9 MCU Group, S7G2 MCU Group, correction of EXENB bit in the CSnCR register
PDF191 KB
Technical Update
GPT : Modified description for OADF and OBDF bits
PDF229 KB
Technical Update
S3 MCU Series, S5 MCU Series, S7 MCU Series, correction of Battery Backup Function
PDF111 KB
Technical Update
S5D3 MCU Group, S5D5 MCU Group, S5D9 MCU Group, enhancement of HOCO accuracy with FLL
PDF159 KB
Technical Update
S5D3 MCU Group, S5D5 MCU Group, S5D9 MCU Group, correction of SPI Data Control Register (SPDCR) bit
PDF107 KB
Technical Update
S5D5 MCU Group, Note on the number of ADC channels.
PDF552 KB
Technical Update
S128 MCU Group, S1JA MCU Group, S3A1 MCU Group, S3A3 MCU Group, S3A6 MCU Group, S3A7 MCU Group, S5D3 MCU Group, S5D5 MCU Group, S5D9 MCU Group, Note on ALeRASE command
PDF153 KB
Technical Update
S5D3 Group, S5D5 Group, S5D9 Group, VBATT minimum voltage level enhancement
PDF220 KB
Technical Update
S5D3 Group, S5D5 Group, S5D9 Group, adding LGA/BGA packages with operating temperature -40 to +105 °C support
PDF134 KB
Technical Update
S5D3, S5D5, S5D9 Errata for User's Manual: Hardware for I/O port
PDF195 KB
Technical Update
Errata for User's Manual: Hardware for HOCO (TN-SY-A0053A/E)
PDF116 KB
Technical Update
Errata for User's Manual: Hardware for HOCO (TN-SY-A0054A/E)
PDF110 KB
Technical Update
Errata for User's Manual regarding the IIC (TN-SYx-A0048A/E)
PDF653 KB
Technical Update
The restriction at switching a clock source (TN-SYx-A0037B/E)
PDF196 KB
Technical Update
Errata for User's Manual regarding the USB
PDF128 KB
Technical Update
The restriction at switching a clock source (TN-SYx-A0037A/E)
PDF208 KB
Technical Update
Functional Limitation of the Ethernet Peripheral Interface
PDF46 KB
Technical Update
Limitations on programming the Option-Setting Memory for flash access applications
PDF133 KB
Technical Update
Revised information about the reserved bit of the SD_ERR_STS1 register in SDHI
PDF88 KB
Technical Update
Additional updates for current version of the User's Manual
PDF717 KB
Technical Update
Revised information for current version of the User's Manuals
PDF1.09 MB
Technical Update
Additional information to the Temperature Sensor (TSN) of S5D9 and S5D5
PDF68 KB
Technical Update
Correction to the description for the Security MPU Program Counter Start Address Register (SECMPUPCSn)
PDF49 KB
Technical Update
[Notes] Solution Toolkit QE for Display Development Assistance Tool for Display Applications
PDF126 KB
Tool News - Note
[Notes] Solution Toolkit QE for Capacitive Touch Development Assistance Tool for Capacitive Touch Sensors
PDF47 KB
Tool News - Note
[Notification] Acceptance for Final Orders for PG-FP5 Flash Memory Programmer, Introducing PG-FP6 as Successor
PDF87 KB
Tool News - Notification
[Upgrade to Version] e² studio Integrated Development Environment 2023-01
PDF129 KB
Tool News - Release
[Upgrade to Version] e² studio Integrated Development Environment 2022-10
PDF154 KB
Tool News - Release
[Upgrade to Version] e² studio Integrated Development Environment 2022-07
PDF127 KB
Tool News - Release
[Upgrade to Revision] Solution Toolkit QE for Capacitive Touch V3.1.0 Development Assistance Tool for Capacitive Touch Sensors
PDF186 KB
Tool News - Release
[Upgrade to Version] e² studio Integrated Development Environment 2022-04
PDF267 KB
Tool News - Release
[Upgrade to Version] Solution Toolkit QE for Capacitive Touch V3.0.1 Development Assistance Tool for Capacitive Touch Sensors
PDF65 KB
Tool News - Release
[Upgrade to revision] Programming GUI for PG-FP6 Flash Memory Programmer (FP6 Terminal) V1.05.01
PDF57 KB
Tool News - Release
[Upgrade to revision] Renesas Flash Programmer V3.08.01
PDF81 KB
Tool News - Release
[Upgraded to version] e² studio 2021-01
PDF159 KB
Tool News - Release
[Upgrade to revision] Programming GUI for PG-FP6 Flash Memory Programmer (FP6 Terminal) V1.05.00
PDF72 KB
Tool News - Release
[Upgrade to revision] Renesas Flash Programmer V3.08.00
PDF83 KB
Tool News - Release
[Upgraded to version] e² studio 2020-10
PDF160 KB
Tool News - Release

设计和开发

软件与工具

Renesas Synergy™ Software Package (SSP)最佳化且紧密集成的适用软件套，具备可扩展最终产品复杂性并简化复杂系统级服务的商用RTOS。 Software Package 瑞萨电子
QE for Capacitive Touch: Development Assistance Tool for Capacitive Touch SensorsIn developing embedded system using the capacitive touch sensor of RA family and RX family MCUs, you can easily setup initial configurations of the touch interface as well as process the tuning of sensors, and reduce development time. [Plugin for Renesas IDE "e2 studio"] 下载:
Capacitive Sensor Microcontrollers CTSU Capacitive Touch Electrode Design Guide Rev.2.00Renesas Synergy Using QE and SSP to Develop Capacitive Touch Applications
 Solution Toolkit 瑞萨电子
Security Key Management ToolKey wrapping tool for key management systems using Renesas security IP. Enables secure installation and update of user application and device lifecycle management (DLM) keys. Solution Toolkit 瑞萨电子

软件下载

文档标题 类型 日期
Renesas Synergy™ Target Board TB-S5D5 v1.2 Design Data
ZIP32.10 MB
PCB设计文档

样例程序

文档标题 Type Date
USBX™ Host Class Mass Storage Module Guide Rev.1.05 - Sample Code
ZIP2.14 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
Mutual Capacitive Touch Software Application Design with Synergy S124 and S3A7 MCUs Rev.1.06 - Sample Code
ZIP3.29 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
Self-Capacitive Touch Software Application Design with Synergy S124 and S3A7 MCUs Rev.1.06 - Sample Code
ZIP3.60 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
Customizing a SSP Module Rev.1.14 - Sample Code
ZIP2.24 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
GUIX™ Synergy Port Framework Module Guide Rev.1.03 - Sample Code
ZIP2.55 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
NetX™ DHCPv6 Server Module Guide Rev.1.02 - Sample Code
ZIP2.00 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
NetX™ Port Ether Module Guide Rev.1.11 - Sample Code
ZIP2.27 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
NetX™, Netx Duo™ DHCP Server Module Guide Rev.1.04 - Sample Code
ZIP2.00 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
Wi-Fi Framework Rev.1.04 - Sample Code
ZIP4.22 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
Wi-Fi Framework on PE-HMI1 Rev.1.05 - Sample Code
ZIP3.83 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
Tuning the Capacitive Touch Solution Rev.1.08 - Sample Code
ZIP4.53 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
NetX™ and NetX Duo™ FTP Client Module Guide Rev.1.02 - Sample Code
ZIP2.49 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
Synergy Device Identity Application Rev.1.02 - Sample Code
ZIP125.86 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
UART HAL Module Guide Rev.1.03 - Sample Code
ZIP3.02 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
USBX™ CDC ACM (Device) Application for S1/S3/S5 Target Board Kits - Application Project Rev.1.07 - Sample Code
ZIP6.84 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
Out-of-Box (OoB) Demonstration (Blinky) Application for S1/S3/S5 Target Board Kits Rev.1.05 - Sample Code
ZIP6.46 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序
User Button/CTSU Button Application for S1/S3/S5 Target Board Kits Rev.1.05 - Sample Code
ZIP7.40 MB
相关文件：
Compiler: GNUARM-NONE
IDE: e2 studio, IAR EW for Synergy
样例程序

开发板与套件

TB-S5D5 Board

RTK7TBS5D5S00001BU

评估
立即订购

TB-S5D5目标板套件

体验Synergy S5D5 MCU群组的完整特性，可访问所有引脚、标准化扩展端口和预装演示软件。

套件内容

  • TB-S5D5目标板
  • USB Type A型转USB Micro-B电缆

系统要求

  • Microsoft® Windows® 7或10，运行频率≥ 2.0...
特色文件:
Target Board S5D5 (TB-S5D5) Quick Start Guide

ECAD 模块

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

扩展 ECAD 模块

模块

Title Type Date
Renesas Synergy™ S5D5 BSDL Rev.1.00 (synergy-s5d5-bsdl-rev100.zip)
ZIP11 KB
模型 - IBIS
Renesas Synergy™ S5D5 IBIS Rev.1.10 (synergy-s5d5-ibis-rev110.zip)
ZIP2.30 MB
模型 - IBIS

产品选择

    Processing table
    器件号
    Program Memory (KB)
    Data Flash (KB)
    SRAM
    Lead Count (#)
    Pkg. Type
    PLP
    Operating Voltage Range (V)
    Operating Freq (Max) (MHz)
    DAC
    I/O Ports
    CAN (ch)
    Safety
    Security & Encryption
    Family Name
    DMA
    Ethernet
    购买 / 样片
    R7FS5D57A3A01CFB#AA0
    play_circleActive
    memory
    view_in_ar
    		384 KB 144 LFQFP 2033 6月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D57A3A01CFP#AA0
    play_circleActive
    memory
    view_in_ar
    		384 KB 100 LQFP 2033 6月 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D57C3A01CFP#AA0
    play_circleActive
    memory
    view_in_ar
    		384 KB 100 LQFP 2033 6月 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D57A2A01CLK#AC0
    play_circleActive
    memory
    view_in_ar
    		384 KB 145 LGA N/A 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D57C2A01CLK#AC0
    play_circleActive
    memory
    view_in_ar
    		384 KB 145 LGA N/A 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D57C3A01CFB#AA0
    play_circleActive
    memory
    view_in_ar
    		384 KB 144 LFQFP 2033 6月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D57A2A01CLK#AC1
    play_circleActive
    memory
    view_in_ar
    可提供样品
    		 512 32 384 KB 145 LGA 2033 10月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No 获取样片,
    R7FS5D57A3A01CFB#AA1
    play_circleActive
    memory
    view_in_ar
    可提供样品
    		 512 32 384 KB 144 LFQFP 2033 6月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No 获取样片,
    R7FS5D57A3A01CFP#AA1
    play_circleActive
    memory
    view_in_ar
    可提供样品
    		 512 32 384 KB 100 LQFP 2033 6月 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No 获取样片,
    R7FS5D57C2A01CLK#AC1
    play_circleActive
    memory
    view_in_ar
    可提供样品
    		 1024 32 384 KB 145 LGA 2033 10月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No 获取样片,
    R7FS5D57C3A01CFB#AA1
    play_circleActive
    memory
    view_in_ar
    可提供样品
    		 1024 32 384 KB 144 LFQFP 2033 6月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No 获取样片,
    R7FS5D57C3A01CFP#AA1
    play_circleActive
    memory
    view_in_ar
    可提供样品
    		 1024 32 384 KB 100 LQFP 2033 6月 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No 获取样片,
    R7FS5D57A3A01CFB#BA1
    play_circleActive
    memory
    view_in_ar
    		384 KB 144 LFQFP 2036 3月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D57A3A01CFP#BA1
    play_circleActive
    memory
    view_in_ar
    		384 KB 100 LQFP 2036 3月 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D57C3A01CFB#BA1
    play_circleActive
    memory
    view_in_ar
    		384 KB 144 LFQFP 2036 3月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D57C3A01CFP#BA1
    play_circleActive
    memory
    view_in_ar
    		384 KB 100 LQFP 2036 3月 2.7 - 3.6 120 12-bit x 2-ch 76 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU
    R7FS5D57A3A01CLK#AC1
    play_circleActive
    memory
    view_in_ar
    		512 32 384 KB 145 LGA 2033 10月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    R7FS5D57C3A01CLK#AC1
    play_circleActive
    memory
    view_in_ar
    		1024 32 384 KB 145 LGA 2033 10月 2.7 - 3.6 120 12-bit x 2-ch 110 2 Yes 3DES, 128-bit Unique ID, AES128, AES192, AES256, ARC4, DSA, GHASH, RSA, SHA-1, SHA-224, SHA-256, TRNG Synergy MCU No No
    Parametric Table tips

    Tips for Using This Parametric Table:

    • Hide Filters button in header: Collapse or expands filters
    • Column sort buttons in header: Sort Column alphabetically / numerically descending or ascending
    • Reset button in header: Reset all filters to the page default
    • Full Screen button in header: Expand the table to full screen view (user must close out of full screen before they can interact with rest of page)
    • Export button in header: Export the filtered results of the table to an Excel document
    • Filter parts search bar in header: Type to filter table results by part number
    • Hide column button in column headers: Select to hide columns in table
    • AND / OR toggle switches in header: Toggles the logic of this particular filter to be “AND” or “OR” logic for filtering results
    • Multiselect checkboxes at beginning of each row in table: Select these checkboxes to compare products against each other
    • Document icon next to product name in row: View the featured document for this product
    • Chip icon next to the right of the document icon in row: View the block diagram for this product
    • Cart icon to the right of the chip icon: Indicates that samples are available for this product

    支持

    联系技术支持获取样片Renesas Synergy™支持Renesas Synergy™ 常见问题Synergy ForumMCU / MPU 选择工具联系销售

    资源

    Renesas Synergy™支持 内容