瑞萨博客

借助Renesas全面的功能安全包，加快为开发人员开发必要的功能安全解决方案

HVPAK chips combine resources to design both flexible motor control and mixed-signal logic using a single chip. Free GUI-based Go Configure™ Software Hub makes the design process intuitive and swift.

The RISC-V platform continues to gain interest and momentum, the Renesas RISC-V ASSP Easy devices lower the barriers to entry with turnkey reference solutions for quick time to market.

The AT25EU SPI NOR Flash family offers designers a radically more energy-efficient solution for code storage, event logging, and data logging applications.

This blog gives a basic introduction to the evolution of some of the functional safety standards including how and why they have been introduced.

端点AI，即在网络边缘设备上集成人工智能。目标是使基于机器学习的智能决策在物理上更接近数据源，因此AI ML向嵌入式端点转移。

本系列将分期介绍瑞萨开发出品的32位MCU RX软件组的历史和前景，这一软件组旨在实现低代码和无代码开发应用程序。第五期将为大家介绍的是RX系列的现代软件开发方法。

Embracing open RAN initiatives, Renesas has joined the movement to enable emerging and existing wireless RAN OEMs with innovative RF, timing, power management, optical, and low-power edge AI solutions.

Imagine the challenge created by managing the power requirements of a data center with hundreds of servers, each of which may have thousands of multi-core processors that draw hundreds of amps per core and must be turned on and off in a matter of nanoseconds. All of that means the corresponding power solutions have to be agile, versatile and scalable. Renesas’ digital power technologies are the solution.