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Quad PLL Field Programmable VersaClock Synthesizer

封装信息

CAD 模型:View CAD Model
Pkg. Type:QSOP
Pkg. Code:PCG20
Lead Count (#):20
Pkg. Dimensions (mm):8.7 x 3.8 x 1.47
Pitch (mm):0.64

环境和出口类别

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)20
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)55
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Advanced FeaturesProgrammable Clock, Reference Output
Core Voltage (V)3.3
Family NameVersaClock
Input Freq (MHz)50
Input TypeCrystal, LVCMOS
Inputs (#)1
Length (mm)8.7
MOQ165
Output Banks (#)1
Output Freq Range (MHz)0.25 - 200
Output Skew (ps)250
Output TypeLVCMOS
Output Voltage (V)3.3
Outputs (#)9
Package Area (mm²)33.1
Period Jitter Typ P-P (ps)200
Phase Jitter Typ RMS (fs)50000
Phase Jitter Typ RMS (ps)50
Pitch (mm)0.64
Pkg. Dimensions (mm)8.7 x 3.8 x 1.47
Pkg. TypeQSOP
Prog. ClockYes
Prog. InterfaceOTP
Reference OutputYes
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumNo
Tape & ReelNo
Thickness (mm)1.47
Width (mm)3.8
已发布No

描述

The 348 field programmable clock synthesizer generates up to 9 high-quality, high-frequency clock outputs including multiple reference clocks from a low frequency crystal or clock input. The 348 has 4 independent on-chip PLLs and is designed to replace crystals and crystal oscillators in most electronic systems. Using IDT's VersaClockTM software to configure PLLs and outputs, the 348 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include eight selectable configuration registers, up to two sets of four low-skew outputs. Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. It can replace multiple crystals and oscillators, saving board space and cost. The 348 is also available in factory programmed custom versions for high-volume applications.