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2 to 4 Differential PCIe GEN1 Clock MUX

封装信息

Pkg. Type: TSSOP
Pkg. Code: PGG20
Lead Count (#): 20
Pkg. Dimensions (mm): 6.5 x 4.4 x 1.0
Pitch (mm): 0.65

环境和出口类别

Moisture Sensitivity Level (MSL) 1
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

产品属性

Lead Count (#) 20
Carrier Type Tube
Moisture Sensitivity Level (MSL) 1
Qty. per Reel (#) 0
Qty. per Carrier (#) 74
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) 0 to 70°C
Country of Assembly Taiwan
Country of Wafer Fabrication Singapore
Price (USD) 3.23927
Accepts Spread Spec Input Yes
App Jitter Compliance PCIe Gen1
Architecture Common
C-C Jitter Typ P-P (ps) 65
Core Voltage (V) 3.3
Diff. Input Signaling HCSL
Diff. Inputs 2
Diff. Output Signaling HCSL
Diff. Outputs 4
Diff. Termination Resistors 16
Function Multiplexer
Input Freq (MHz) -
Input Type HCSL
Inputs (#) 2
Length (mm) 6.5
MOQ 148
Output Banks (#) 1
Output Freq Range (MHz) -
Output Skew (ps) 50
Output Type HCSL, LVDS
Output Voltage (V) 3.3
Outputs (#) 4
PLL No
Package Area (mm²) 28.6
Pitch (mm) 0.65
Pkg. Dimensions (mm) 6.5 x 4.4 x 1.0
Pkg. Type TSSOP
Power Consumption Typ (mW) 264
Prog. Clock No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Supply Voltage (V) -
Tape & Reel No
Thickness (mm) 1
Width (mm) 4.4
已发布 No

描述

The 557-06 is a two to four differential clock mux designed for use in PCI-Express applications. The device selects one of the two differential HCSL input pairs and fans out to four pairs of differential HCSL or LVDS outputs.