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瑞萨电子 (Renesas Electronics Corporation)
256 x 18 DualSync FIFO, 5.0V

封装信息

CAD 模型:View CAD Model
Pkg. Type:PBGA
Pkg. Code:BG121
Lead Count (#):121
Pkg. Dimensions (mm):15.0 x 15.0 x 2.15
Pitch (mm):1.27

环境和出口类别

Pb (Lead) FreeNo
Moisture Sensitivity Level (MSL)3
ECCN (US)
HTS (US)

产品属性

Lead Count (#)121
Pb (Lead) FreeNo
Carrier TypeTray
ArchitectureDual FIFO
Bus Width (bits)18
Core Voltage (V)5
Density (Kb)4
Family NameDualSync
I/O Frequency (MHz)66 - 66
I/O Type5.0 V TTL
InterfaceSynchronous
Length (mm)15
MOQ63
Moisture Sensitivity Level (MSL)3
Organization256 x 18
Package Area (mm²)225
Pb Free Categorye0
Pitch (mm)1.27
Pkg. Dimensions (mm)15.0 x 15.0 x 2.15
Pkg. TypePBGA
Qty. per Carrier (#)126
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)0 to 70°C
Thickness (mm)2.15
Width (mm)15
已发布No

描述

The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.