| CAD 模型: | View CAD Model |
| Pkg. Type: | PLCC |
| Pkg. Code: | PLG32 |
| Lead Count (#): | 32 |
| Pkg. Dimensions (mm): | 13.97 x 11.43 x 2.79 |
| Pitch (mm): | 1.27 |
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
| Lead Count (#) | 32 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 3 |
| Access Time (ns) | 25 |
| Architecture | Uni-directional |
| Bus Width (bits) | 9 |
| Core Voltage (V) | 3.3V |
| Density (Kb) | 4 |
| Family Name | AsyncFIFO |
| I/O Type | 3.3 V LVTTL |
| Interface | Asynchronous |
| Length (mm) | 13.97 |
| MOQ | 256 |
| Organization | 512 x 9 |
| Package Area (mm²) | 159.7 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 13.97 x 11.43 x 2.79 |
| Pkg. Type | PLCC |
| Price (USD) | $9.67137 |
| Qty. per Carrier (#) | 32 |
| Qty. per Reel (#) | 0 |
| Tape & Reel | No |
| Temp. Range (°C) | -40 to 85°C |
| Thickness (mm) | 2.79 |
| Width (mm) | 11.43 |
| 已发布 | No |
The 72V01 is a 512 x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.