概览
描述
The 74LVC16827A 20-bit buffer provides high-performance bus interface buffering for wide data/address paths or buses carrying parity and can operate as two 10-bit buffers or one 20-bit buffer. The 74LVC16827A buffer is ideally suited for driving high capacitance loads and low impedance backplanes. All pins can be driven from either 3.3V or 5V devices which allows the use of the device as a translator in a mixed 3.3V/5V supply system. The 74LVC16827A operates at -40C to +85C
特性
- Typical tSK(o) (Output Skew) 250ps
- ESD > 2000V per MIL-STD-883, Method 3015
- > 200V using machine model (C = 200pF, R = 0)
- VCC = 3.3V ± 0.3V, Normal Range
- VCC = 2.7V to 3.6V, Extended Range
- CMOS power levels (0.4 uW typ. static)
- All inputs, outputs, and I/O are 5V tolerant
- Supports hot insertion
- Available in 56 pin TSSOP package
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