封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG72 |
| Lead Count (#): | 72 |
| Pkg. Dimensions (mm): | 10.0 x 10.0 x 1.0 |
| Pitch (mm): | 0.5 |
环境和出口类别
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Moisture Sensitivity Level (MSL) | 3 |
产品属性
| Pkg. Type | VFQFPN |
| Lead Count (#) | 72 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tray |
| Country of Assembly | TAIWAN |
| Country of Wafer Fabrication | TAIWAN |
| Advanced Features | Hitless Reference Switching, External Sync Input |
| App Jitter Compliance | Stratum 3, Stratum 4, Stratum 4E, SMC, ITU, Telcordia |
| Application | System Synchronizer |
| Channels (#) | 1 |
| Clock Support | G.813 Opt 1, G.813 Opt 2, G.8262 Opt 1, G.8262 Opt 2, GR-1244-CORE Stratum 4, GR-1244-CORE Stratum 4E, GR-1244-CORE Stratum 3, GR-253-CORE SONET Minimum Clock, GR-253-CORE SONET Stratum 3 |
| Core Voltage (V) | 3.3 |
| Diff. Inputs | 2 |
| Diff. Outputs | 2 |
| Input Freq (MHz) | 1.0E-6 - 625 |
| Input Freq Range Type | 1PPS (1 Hz), TDM, DS1, E1, SONET/SDH, Ethernet, Sync Pulse |
| Input Type | AMI, LVPECL, LVDS, LVCMOS |
| Inputs (#) | 6 |
| Length (mm) | 10 |
| MOQ | 168 |
| Moisture Sensitivity Level (MSL) | 3 |
| Output Banks (#) | 6 |
| Output Freq Range (MHz) | 1.0E-6 - 644.531 |
| Output Freq Range Type | 1PPS (1 Hz), TDM, DS1, E1, DS2, E3, DS3, 100BASE-T, STM-1/OC-3, STM-4/OC-12, 1000BASE-T/X |
| Output Signaling | LVPECL, LVDS, LVCMOS, AMI |
| Output Type | LVPECL, LVDS, LVCMOS, AMI |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 8 |
| Package Area (mm²) | 100 |
| Pb Free Category | e3 Sn |
| Phase Jitter Typ RMS (ps) | 0.8 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 10.0 x 10.0 x 1.0 |
| Price (USD) | $51.3253 |
| Prog. Clock | Yes |
| Prog. Interface | I2C, SPI |
| Qty. per Carrier (#) | 168 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1 |
| Width (mm) | 10 |
| 已发布 | No |
有关 82V3398 的资源
描述
The 82V3398 is an integrated, single-chip solution for the Synchronous Equipment Timing Source (SETS) for Stratum 3, 4E, 4, SMC, EECOption1, EEC-Option2 clocks in SONET/SDH/Synchronous Ethernet equipment, DWDM, and wireless base stations. The device consists of a high-quality and configurable DPLL to provide a system clock for node timing synchronization within a SONET/SDH/Synchronous Ethernet network.