特性
- Fourth Generation FemtoClock® NG PLL technology
- Two differential LVPECL outputs
- Crystal oscillator interface designed for 12pF, 25MHz parallel resonant crystal
- CLK/nCLK input pair can accept the following differential input levels: LVPECL, LVDS, HCSL
- RMS phase jitter at 100MHz (12kHz – 20MHz): 0.510ps (typical)
- RMS phase jitter at 125MHz (12kHz – 20MHz): 0.575ps (typical)
- RMS phase jitter at 156.25MHz (12kHz – 20MHz): 0.504ps (typical)
- RMS phase jitter at 212.5MHz (12kHz – 20MHz): 0.512ps (typical)
- 3.3V power supply
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
843N3960I - Block Diagram
描述
The 843N3960I is an LVPECL clock synthesizer. The 843N3960I can synthesize 100MHz, 125MHz, 156.25MHz, and 212.5MHz from a single 25MHz crystal or reference clock. Utilizing an external loop filter capacitor, the 843N3960I is capable of holdover mode when the main reference clock becomes unstable, making this ideal for redundant timing applications.
