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Low Skew,1-to-9 Differential-to-HSTL Fanout Buffer

封装信息

Lead Count (#) 32
Pkg. Code PRG32
Pitch (mm) 0.8
Pkg. Type TQFP
Pkg. Dimensions (mm) 7.0 x 7.0 x 1.4

环境和出口类别

Moisture Sensitivity Level (MSL) 3
Pb (Lead) Free Yes
ECCN (US) NLR
HTS (US) 8542390000

产品属性

Lead Count (#) 32
Carrier Type Tray
Moisture Sensitivity Level (MSL) 3
Input Type LVPECL, LVDS, HSTL, SSTL, HCSL
Qty. per Reel (#) 0
Qty. per Carrier (#) 250
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range 0 to 70°C
Core Voltage (V) 3.3
Input Freq (MHz) 0 - 500
Inputs (#) 2
Length (mm) 7.0
MOQ 250
Output Banks (#) 1
Output Freq Range (MHz) 0 - 500
Output Signaling HSTL
Output Skew (ps) 50
Output Type HSTL
Output Voltage (V) 1.8
Outputs (#) 9
Package Area (mm²) 49.0
Pitch (mm) 0.8
Pkg. Dimensions (mm) 7.0 x 7.0 x 1.4
Pkg. Type TQFP
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Thickness (mm) 1.4
Width (mm) 7.0

描述

The 8521 is a low skew, 1-to-9 Differential-to-HSTL Fanout Buffer. The 8521 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output skew, part-to-part skew and crossover voltage characteristics make the 8521 ideal for today's most advanced applications, such as IA64 and static RAMs.