概览
描述
The 8530F-01 is a low skew, 1-to-16 Differential-to-3.3V LVPECL Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-to-peak input voltages as small as 150mV as long as the common mode voltage is within the specified minimum and maximum range. Guaranteed output and part-to-part skew characteristics make the 8530F-01 ideal for those clock distribution applications demanding well defined performance and repeatability.
特性
- Sixteen differential LVPECL output pairs
- CLK, nCLK input pair
- CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
- Maximum output frequency: 500MHz
- Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input
- Output skew: 20ps (typical)
- Additive phase jitter, RMS @ 106.25MHz: 0.11ps (typical)
- Full 3.3V supply voltage
- 0°C to 70°C ambient operating temperature
- Available in lead-free (RoHS 6) package
产品对比
应用
文档
相关文档
请登录后开启订阅
|
|
|
---|---|---|
类型 | 文档标题 | 日期 |
数据手册 | PDF 246 KB | |
应用说明 | PDF 91 KB | |
应用说明 | PDF 1.99 MB | |
概览 | PDF 217 KB | |
应用说明 | PDF 322 KB | |
应用说明 | PDF 495 KB | |
应用说明 | PDF 442 KB | |
应用说明 | PDF 153 KB | |
应用说明 | PDF 565 KB | |
9 items
|
设计和开发
模型
ECAD 模块
点击产品选项表中的 CAD 模型链接,查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用,可直接在 SamacSys 请求该符号或模型。

产品选项
当前筛选条件